Papers by Keyword: Dielectric Breakdown

Abstract: Silicon carbide (SiC) is intrinsically more suitable for high temperature operation than silicon. However, for devices and circuits based on metal-oxide-semiconductor, high temperature behavior of gate oxides is still under investigation. This work aims to provide insights on how temperatures from room temperature up to 500 °C affect gate oxide properties of metal-oxide-semiconductor structures. Characterization is performed by current-voltage (I-V) and capacitance-voltage (C-V) measurements with different SiC and polysilicon gate electrode doping types. Increasing breakdown voltages were observed with higher temperatures for n-type SiC doping, while p-type ones break down at lower voltages. Polysilicon doping type only has minor impact on the breakdown voltage but influences the I-V behavior. High temperatures increase the probability of strong inversion being observable in C-V investigation. Regarding the I-V results, it can be stated that the 55 nm gate oxide used in the utilized HT CMOS technology has breakdown voltages above absolute values of around 55 V, independent of any doping types, and no significant current could be observed within the intended 20 V operation range of the technology.

Abstract: 3C-SiC technology has advanced a lot in the last decade and the interests in making 3C-SiC power devices are growing again, in research and industry. Despite of that, there has been a lack of knowledge on the reliability of the 3C-SiC MOS structure. In this paper, we investigated the MOS capacitors fabricated on 3C-SiC/Si substrates at room temperature. From the simple I-V characterisation, an effective barrier height as high as 3.65-3.71 eV can be extracted for the fabricated 3C-SiC/SiO₂ interface. Reliability test under elevated gate bias which lasts weeks demonstrates an acceptable failure rate (3450 PPM) for these state-of-the-art 3C-SiC MOS capacitors. The failure mechanism study suggests the intrinsic region is still not reached and there is still much room to improve the reliability. Minimising some obvious extrinsic defects which lead to early breakdown alone can reduce the failure rate by 100 times.

Abstract: In this work, the origin of the dielectric breakdown of 4H-SiC power MOSFETs was studied at the nanoscale, analyzing devices that failed after extremely long (three months) of high temperature reverse bias (HTRB) stress. A one-to-one correspondence between the location of the breakdown event and a threading dislocation propagating through the epitaxial layer was found. Scanning probe microscopy (SPM) revealed the conductive nature of the threading dislocation and a local modification of the minority carriers concentration. Basing on these results, the role of the threading dislocation on the failure of 4H-SiC MOSFETs could be clarified.

Abstract: In this paper, we study the electrical properties and breakdown phenomena of BaTiO₃/Teflon composite ferroelectric thin film in electrowetting systems. The experimental results showed that the electrowetting effect and the breakdown voltage depend on DC voltage polarity, and this polarity dependence is closely related to the thickness of the ferroelectric film. Under AC voltages, the breakdown voltage increased directly with voltage frequency. These results are useful for designing reliable EWOD devices with low operation voltages and high robustness.

Abstract: In this paper, we study the electrical properties and breakdown phenomena of PZT ferroelectric thin film in electrowetting systems. The experimental results indicate that irreversible charge trapping occurred with repeated voltage actuation, resulting in contact angle relaxation and reduction of the ferroelectric film breakdown strength. The breakdown voltage depends on DC voltage polarity, and this polarity dependence was found to be related to the thickness of the ferroelectric layer. When AC voltage was applied, the breakdown voltage increased directly with voltage frequency. These phenomena are interpreted in terms of electrochemical reactions at the liquid/solid interface, an empirical model was used to estimate the amount of trapped charge in the ferroelectric film.

Abstract: In an electrowetting-based liquid microactuator, two types of insulating materials are used for device operation: an dielectric material to provide capacitance between the liquid and conductor, and a hydrophobic coating at the interface of liquid and insulator. This paper investigates important physical properties for the insulating materials. Several alternative dielectric materials are compared for application in EW chips, breakdown phenomenon of insulating layers with different thicknesses is tested before and after droplet actuation. It appears that the used EW devices have lower breakdown voltages than unused devices, probably due to the locally trapped charges in the insulating layer.

Abstract: The mechanism of dielectric breakdown of oxide on step-bunching of 4H-silicon carbide (SiC) was investigated. Comparing the surface morphology obtained before forming metal-oxide-semiconductor (MOS) capacitor and optical emission on the capacitor under electrical stress, it was cleared that current concentrates on step-bunching and it often caused preferential dielectric breakdown. Based on TEM analysis and the observation of time dependence of emission under the stress, a new model was proposed to explain the dielectric breakdown on step-bunching.

Abstract: The requirement for fabrication of the nanometer-scale structures has grown up recently due to the advance in the development of the nanoscale electronic-devices or bio-devices. Scanning tunneling microscope (STM)-based electric lithography is one of the potential fabrication approaches to produce nanoscale structures on a variety of materials. This study of the STM-based electric lithography intends to fabricate flat-bottomed and lamellar structures on the graphite surface, which differs from the conventionally fabricated tapered structures. The formation and the comparison of both the lamellar and tapered structures are obtained by applying distinct STM tip geometries in the STM-based electric lithography. On the basis of the experimental results, it is found that the formation of lamellar structures should be attributed to the local electrochemical reaction, while the generation of tapered structures is resulted from the dielectric breakdown in the tip-sample gap.

Abstract: Photo emission phenomenon and reliability of thermal oxides grown on n-type 4H-SiC (0001) wafer have been investigated using photo emission microscope. Thermal oxides were grown by dry oxidation, and treated in nitrous oxide atmosphere as followed by hydrogen post oxidation annealing. An initial photo emission phenomenon with weak intensity exists just after stress current is applied to the thermal oxide. It is confirmed that most initial emission occurred at the same position as dielectric breakdown of the thermal oxide. Also, the initial emission phenomenon was observed in the MOS capacitors broken by extrinsic defects such as threading screw dislocations and surface defects. In addition, the photo emission due to Fowler-Nordheim tunnel current through the thermal oxide has peak intensity at 2.48 eV.

Abstract: Reliability of thermal oxides grown on the n-type 4H-SiC substrates implanted by nitrogen ion with low doping levels equal to or less than 1x1018 cm-3 has been investigated. The surface morphology becomes rough by the nitrogen implantation and the post implantation annealing. The field-to-breakdown value decreases with increase in the nitrogen concentration. The average EBD values are 11.6 MV/cm, 11.3 MV/cm and 10.7 MV/cm for the samples without the implantation and with the nitrogen implantation of doping levels of 1x1017 cm-3 and 1x1018 cm-3, respectively. The time-to-breakdown values were also degraded with the increase of the nitrogen implantation doping level. The reliability degradation of thermal oxides is caused by the implantation-induced breakdown factor.