Papers by Keyword: Dual-Gate

Abstract: We report on the fabrication of dual-gate pentacene organic thin-film transistors (OTFTs) using a plasma-enhanced atomic layer deposited (PEALD) 150 nm thick Al2O3 as a bottom gate dielectric and a 300 nm thick parylene or a PEALD 200 nm thick Al2O3 as both a top gate dielectric and a passivation layer. The threshold voltage (Vth) of OTFT with a 300 nm thick parylene as a top gate dielectric is changed from 4.7 V to 1.3 V and that with a PEALD 200 nm thick Al2O3 as a top gate dielectric is changed from 1.95 V to -9.8 V when the voltage bias of top gate electrode is changed from -10 V to 10 V. The change of Vth of OTFT with the dual-gate structure has been successfully understood by an analysis of electrostatic potential.