Papers by Keyword: Gate Delay

Abstract: Aiming at the problems of the influence in power-supply variations on timing analysis, this paper presents a new method to assign a supply-dependent hold margin based on analysis of scientific data materials, which describe a method to accurately characterize logic gates for the sensitivity of delay on supply-voltage variations, and then the method use a commercial microcontroller as a design example. Experiment results shows that the new method with analysis of scientific materials can get a good performance, even under the existing noise.