Papers by Keyword: SONOS

Abstract: For the system on panel applications, we fabricated and analyzed the polycrystalline silicon (poly-Si) silicon-oxide-nitride-oxide-silicon (SONOS) memory device on different buffer layer such as oxide or nitride. The threshold voltage (VT) and transconductance (gm) are extracted from each device and the X-Ray Diffraction (XRD) measurement is carried out to interpret these characteristics. The results show the device on oxide layer has higher mobility and lower VT than on nitride layer. From the XRD spectra, it can be explained by the fact that the grain size of poly-Si on oxide layer has larger than on nitride layer. The both devices show program/erase characteristics as the potential of SOP memory devices.

Abstract: In this work we report on the structural and electrical properties of SiO₂/Si3N₄/HfO₂ memory stacks with emphasis upon the influence of Atomic Layer Deposition chemistry used for forming the HfO₂ blocking layer. Two HfO₂ precursor chemistries were employed, the tetrakis- (ethylmethylamino)hafnium (TEMAH) and the bis(methylcyclopentadienyl)methoxymethylhafnium (HfD-04). Ozone was used as the oxygen source. The structural characteristics of the stacks were examined by means of TEM and GIXRD. Comparative studies conducted with the use of platinum gated capacitors showed that the samples grown using TEMAH have an increased electron trapping ability in comparison to the HfD-04 ones. While the two structures exhibit similar Write/Erase and retention characteristics, The samples grown from TEMAH can sustain more repeated W/E cycles (> 3×10⁵ in the 10V/-11V, 10 ms regime) compared to the samples grown from HfD-04 (< 10⁴ W/E cycles). This difference in endurance characteristics is attributed mainly to the different deposition temperatures used with these two precursors and the nature of the interfacial layer they produce between the Si₃N₄ and the HfO₂ layers.

Abstract: The paper reviews recent progress and current challenges in implementing high-k dielectrics in microelectronics. Logic devices, non-volatile-memories, DRAMs and low power mixedsignal components are found to be the technologies where high-k dielectrics are implemented or will be introduced soon. Two gate architectures have to be considerd: MOS with metal as gate electrode and MIM. In particular, Hf-silicates for logic and NVM devices in conventional MOS architecture and ZrO2 for DRAM cells in MIM architecture are discussed.