Papers by Keyword: Semiconductor Device

Abstract: The last 19 years have seen intense research made on zinc oxide (ZnO) material mainly due to the ability of converting the natural n-type material into p-type. For a long time, the p-type state was impossible to attain and maintain. The review focuses on ways of improving the doped ZnO material which acts as a channel for nanowire field effect transistor (NWFET) and biosensor. The biosensor has specific binding which is called functionalisation achieved by attaching a variety of compounds on the designated sensing area. Reference electrodes and buffers are used as controllers. Top-down fabrication processes are preferred over bottom-up because they pave way for mass production. Different growth techniques are reviewed and discussed. Strengths and weaknesses of the FET and sensor are also reviewed.

Abstract: For the backgrinding of semiconductor devices, a rotary grinding process is indispensable for achieving the required wafer thickness. The relative velocity between the grinding wheel and the wafer is maximum at the periphery of the wafer and minimum at the center of wafer. Generally, the grinding performances are discussed in terms of the ratio of the rotational speeds of the grinding wheel and the wafer. However, it is not possible to use this ratio to determine the grinding conditions for different wafer sizes grinding as this ratio does not show the difference in relative velocity. Therefore, a new relative velocity ratio was defined in this study. Then, the Si wafer grinding was performed to investigate the effect of the surface roughness and the power consumption of the grinding wheel spindle on the relative velocity ratio.

Abstract: Silicon-On-Insulator (SOI) technology exhibits significant performance advantages over conventional bulk silicon technology in both electronics and optoelectronics. In this chapter we present an overview of recent applications on light emission from SOI materials. Particularly, in our work we used SOI technology to fabricate light emitting diodes (LEDs), which emit around 1130 nm wavelength with an external quantum efficiency of 1.4 × 10−4 at room temperature (corresponding to an internal quantum efficiency close to 1 %). This is almost two orders of magnitude higher than reported earlier for SOI LEDs. This large improvement is due to three carrier confinement mechanisms: geometrical effects, quantum-size effects, and electric field effects. Our lateral p+/p/n+ structure is powered through two very thin silicon slabs adjacent to the p+/p and n+/p junction. Such use of thin silicon films aims to reduce the p+ and n+ contact area and to confine the injected carriers in the central lowly doped p-region. With this approach, we realized an efficient compact infrared light source with high potential switching speed for on-chip integration applications.