Papers by Keyword: SiC Power Module

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Abstract: This study developed two types full SiC half bridge power module, which consist of IEMOS (Implantation Epitaxial MOSFET / Planer structure) or VMOS (V-groove trench MOSFET / Trench structure). The switching loss and conduction loss of the power module are evaluated in H bridge circuit. The VMOS module experimentally shows less loss than IEMOS module.
851
Abstract: This paper develops 1200V, 50A full SiC half bridge power module, which embeds C snubber and gate resistors. Embedded C snubber suppresses surge voltage in fast switching operation, and gate resistors avoid gate oscillation of parallel connected SiC MOSFET in the module. 1MHz switching operation of developed module with 600V DC-link voltage is experimentally confirmed.
832
Abstract: Transient thermal analysis is a very useful tool for thermal evaluation to realize the stable operation of SiC power modules which are operated at higher temperatures than conventional Si power modules. A transient thermal analysis system to investigate the thermal characteristics of SiC power modules at high temperature is presented. We have found that precise temperature measurement at the initial stage of the junction temperature decay curve is necessary in order to evaluate the thermal resistance and heat capacity of the die attach, since the thermal diffusivity of SiC is larger than that of Si and the temperature distribution of SiC die was considered. Using the proposed transient thermal analysis method, the thermal resistance and heat capacity of the AuGe die attach under the SiC-SBD was successfully evaluated at temperatures up to 250 °C.
1078
Abstract: Packaging plays an important role to allow the full potential of silicon carbide devices to be realised. The physical properties of silicon carbide will allow devices to operate with junction temperatures well above 200 °C, but today standard-packaged SiC products are limited to a maximum junction temperature of 175 °C. The limitation lies in the packaging, because a power device package is a complex structure consisting of many components of different materials and with correspondingly different thermal properties. As such, the assembly technologies define both the performance and lifetime of discrete packages and power modules. In this paper we give an insight of packaging technology for SiC devices from the beginning in the mid-1980s through to the state-of-the-art of today. In addition, new packaging technologies to enable power SiC devices to operate up to 200 °C are discussed.
1043
Abstract: Silicon carbide power devices are intended and to enter new application regimes in power electronics, in fact, they are enabling components mainly if higher switching frequencies in power electronics are considered. This trend can be clearly observed since power density can be increased and efforts towards passive components and other mechanical contributions to the system can be reduced. However, this trend imposes new challenges towards the surrounding of the chips in form of the package itself and the whole system around. Stray components like inductances and impedance elements become crucial elements in the whole circuit what results in the fact that a simple exchange of silicon chips by silicon carbide in a given package can be ruled out. In addition different considerations regarding the thermal design especially in power modules arise when SiC chips are considered, triggered by the fact that the cost balance between assembly and chip is shifted compared to silicon based solutions. Thus, different optimization criteria can be used, leading to new design approaches for power modules. The following paper will give a first inside how those boundary conditions can be implemented in innovative solutions using SiC components.
869
Abstract: Three dimensional models of both single-chip and multiple-chip power sub-modules were generated using ANSYS in order to simulate the effects of various substrate materials, heat fluxes, heat transfer coefficients, and device placement configurations on temperature and thermal stress contours. Alumina, aluminum-nitride, and CVD diamond were compared as substrates. Heat fluxes of 100 to 500 watts/cm2 resulted in SiC device junction temperatures in the range of 350 to 650 K. The predicted maximum operating temperature for a chip, to which 300 watts/cm2 of heat flux was applied, would be 239°C (512 K). In the applied heat flux range, the minimum and maximum Von Mises stress of a simulated single SiC device sub-module was between 1.2 MPa to 2.4 GPa. The maximum shear stress at 300 watts/cm2 was predicted to be 243 MPa. Both the maximum and minimum chip temperature decreased with increasing heat transfer coefficient from 25 to 2500 watts/m2 K. With modest cooling, represented by a heat transfer coefficient (hconv) of 250 watts/m2 K, SiC chips operated at 300 watts/cm2 power density maintained junction temperatures Tj < 400 K. If consistent with simulation results, CVD diamond integrated substrates should be superior to those comprised of AlN or Al2O3. Asymmetric device placement in the multi-chip module proved more effective at avoiding potential hot spots than the symmetric configuration.
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