Papers by Keyword: Surface Voltage

Abstract: Non Visual Defects (NVD) is a category of defects that cause electrical failures but are not detected with visual wafer inspection tools. Our approach for NVD detection is based on the Kelvin probe surface voltage mapping technique. The detection of defects is enhanced using field-effect created in a non-contact manner by corona charge deposition on the surface of semiconductor. Precise defect location is accomplished with surface voltage gradient magnitude mapping that enhances delineation of defects. Detected defects are characterized locally using the corona-voltage technique or isothermal voltage transient decay analysis. Presented examples include: dielectric charge and interfacial defect mapping on 300mm Si wafers; deep level emission mapping on epitaxial SiC and mobile ion mapping in Si solar cells.

Abstract: As a small molecule and cationic accelerating agent, octyl hexyl dimethyl ammonium bromide (OHDMAB) is a very effective accelerator in dyeing silk with reactive dyes. In this paper the accelerant mechanism of OHDMAB was studied. The results showed that OHDMAB can promote the aggregating of dye molecules in aqueous solution efficiently. With the change of the temperature, the concentration of accelerating agent, the aggregation of dye molecules varies to some extent. As a result, the maximum absorption wavelength of dye, the particle size of dye in aqueous solution, and the surface potential are changing regularly. OHDMAB can make the surface voltage of silk positive easily, this maybe the most important factor of the mechanism of the OHDMAB accelerant.

Abstract: The static electricity of wet clean was characterized by contactless surface voltage measurement on silicon oxide dielectric in this study. The paper shows surface static charge at wafer center caused by a single wafer spin cleaning tool. Deionized water (DIW) rinse was verified as the critical step of inducing static charge. It was demonstrated by metal oxide semiconductor (MOS) capacitor that such serious dielectric static charge would degrade gate oxide integrity (GOI). With dissolved CO₂ to lower DIW resistance, surface static charge at wafer center is reduced and degraded GOI is restored as a result.

Abstract: A subthreshold current model for fully depleted strained Si on insulator (FD SSOI) MOSFET is developed by solving the two-dimensional (2D) Poisson equation and the conventional drift-diffusion theory. Model verification is carried out using device simulator ISE. Good agreement is obtained between the model’s calculations and the simulated results. This subthreshold current model provides valuable reference to the FD-SSOI MOSFET design.