Papers by Keyword: VIA

Abstract: In this paper, a microstrip line-fed rectangular-shaped ultra-wideband (UWB) antenna offering triple-band notch characteristics is proposed. The notching was done primarily to provide rejection for Wi-Max (3.3-3.7 GHz), WLAN2 (5.15-5.825 GHz), and ITU (8.025-8.4 GHz) through the combination of slots and a modified electromagnetic band gap (M-EBG). The antenna was simulated using HFSS and CST modelling tools. The antenna was able to notch three frequencies from narrow band communication systems (Wi-Max, WLAN2, and ITU), causing interference within the UWB band. The gain of the system over the operating frequency, the current distributions, and the impedance covered were studied to assess the effectiveness of the antenna. The proposed antenna is simple and compact, with a total antenna size of 19 mm by 24 mm and a wide bandwidth (3.2 to 12.5 GHz). Satisfactory results have been obtained when its performance was analyzed. A stable radiation characteristic is observed with a radiation efficiency of 94% when operating at a UWB resonant frequency of 6.85 GHz with a total gain between -10 dB and 5 dB within the range of the frequency band of 3.2 to 12.3 GHz.

Abstract: This paper presents parametric study of dual band notch ultra wideband (UWB) antenna using modified electromagnetic band gap. The Electromagnetic Band Gap (EBG) comprises of two strip patched and an edge-located via with respect to ground for dual notch band. The study was presented in order to have an improved knowledge of EBG characteristics and its effect on the notching band of a small squared ultra wideband antenna of size 24 by 31 mm² dual band notch using HFSS software. The antenna operates within the return loss (s11< -10dB) 3.2 to 12.3 GHz. The simulation results show that the notched band between 4.57 – 4.99 GHz and 7.96 – 8.32 GHz corresponding to WLAN and ITU respectively was achieved. The effect of gap distance between the field line and EBG was demonstrated as well and the position of via with respect to the ground as a means for notched band centre frequency tuning. The antenna could be considered a good candidate for any UWB applications that must avoid narrow band interference. The research gives ideas on the best placement position of EBG structure along field line in UWB antenna frequency notching technique.

Abstract: In modern electronic systems, data rate is keeping increase, and Gbps becomes common, designing for reliable signal integrity becomes more and more important. In the high speed borad/package design, discontinuities are big concerns of signal integrity. A variety of sources lead to discontinuities and every source ought to be carefully treated. The signal via is one source of discontinuity that should not be overlooked. Vias can add jitter and reduce eye openings that can cause data misinterpretation by the receiver. This paper detail the antipad, pad and excess via stub effect on the vias. In each case, the impedance mismatch at the via transition can be minimized by optimizing a few parameters such as antipad radius, pad radius and excess via stub. The impacts of these parameters are investigated with the help for a full-wave 3D electromagnetic simulator.

Abstract: This paper based on ANOVA (ANalysis Of VAriance) presents an investigation in the design of signal via in multilayered printed circuit boards (PCB) technology from a signal integrity point of view. Using the concept of the orthogonal array (OA), different vias physical aspect ratios have been set in the analysis. The impacts of these parameters are investigated with the help for a full-wave electromagnetic simulation soft HFSS. This study demonstrates the factors which is the most influence on the signal integrity.

Abstract: Electromigration(EM) failure can be occurred in the via because of the high aspect ratio of Via and the high stress in the via. The theoretical and experimental study is developed in detail. The different via structures are designed and the simulation and accelerate test is operated. The result shows the current density and electric field in the via is decreased apparently and reliability is improved by use the structures, so it is considered of the practical means for improving the copper via interconnect reliability. Finally, two optimized via structures are advanced based on the result of experiments and simulations. The two structures are instructive for the design and manufacture.

Abstract: Interconnect RC delay is the limiting factor for device performance in submicron semiconductor technology. Copper and low-k dielectric materials can reduce this delay and have gained widespread acceptance in the semiconductor industry. The presence of copper interconnects provides unprecedented challenges for via cleaning technology and requires the development of novel process chemistries for improved device capability.