Papers by Keyword: Via Filling

Abstract: The μ-via in microelectronic substrate should have multiple purposes, one of them is to allow to the path of signal or current from electronic devices. The micro void can be easily formed in μ-via because μ-vias are filled with a screen printing process and the size of via is small. The residual void has been known as crack initiation of copper layer during a reliability test. The solder resist filling process and the behavior of a residual void in μ-vias were investigated. The void extraction process was very effective comparing with the conventional process to remove a residual void. As extracted with 1.5 atm for more than 30 sec, the residual void in μ-BVH was perfectly eliminated.

Abstract: Electroplating of copper in via filling is very important in 3D SiP (System in Packaging). Defect free via filling can be obtained through additive in the electrolyte and current type control. Via in Si wafer were formed by RIE method with 170 &m depth and 50 &m in diameter. Seed layers were deposited by ionized metal plasma (IMP) sputtering; Ta for diffusion barrier, Cu for conductive layer. Via was filled with copper by electroplating method. Different types of additives were used in via filling; PEG, SPS, Cl- and JGB. Defects in via were controlled and eliminated by precise monitoring of additive concentration and input current. The optimum condition of electroplating was determined by getting cross-sectional images of filled vias and by determining the degree of via filling.

Abstract: Copper via filling is an important factor in 3D stacking interconnection of SiP (system in package). As the packaging density is getting higher, the size of via is getting smaller. When DC electroplating is applied, a defect-free hole cannot be obtained in a small size hole. To prevent the defects in holes, pulse and pulse reverse current was applied in copper via filling. The size of 50, 70, 100
in diameter and 100
in height. The holes were prepared by DRIE method. TaN and Ta was sputtered for copper diffusion barrier. Via specimen were filled by DC, pulse and pulse-reverse current electroplating methods. The effects of additives and current types on copper deposits were investigated. Vertical and horizontal cross section of the via were observed by SEM to find the defects in via. When pulse-reverse electroplating method was used, defect free via were uccessfully obtained.