Papers by Keyword: Wet Cleaning

Abstract: As semiconductor devices continue to scale, it is important to evaluate alternative metals on narrower wiring or via structures. Ruthenium (Ru) is one promising candidate because of its lower resistivity compared to the conventional metals such as copper (Cu), cobalt (Co) and tungsten (W) on narrow space. To prevent leakage problems between metal layers caused by residues on the bottom and sidewalls after the metal patterning process, a cleaning process for Ru metal lines is necessary. Although the industry standard using Ammonia Peroxide Mixture (APM) is effective for removing residues, it was ineffective for Ru semi-damascene stack. Therefore, a new cleaning method involving UV treatment followed by APM, which was tested on metal pitch 18 nm patterned structure, was developed. This method showed promising results and is expected to be used in manufacturing of future semiconductor devices.

Abstract: As miniaturization progresses, pattern collapse during the drying step of wet cleaning processes has become a critical issue in the semiconductor industry. In this study, we used reactive molecular dynamics simulations to analyze pattern collapse, with a focus on bondings and reactions. To simulate pattern deformation during the drying process of wet cleaning, we created a FinFET model as a HAR structure. The surface of this model was terminated with hydrogen atoms. The widths between the patterns were changed in order to create a Laplace pressure difference when water molecules were placed on the surface. The model was simulated by placing water molecules up to half the height of the pattern. As a result, the pattern was deformed. Furthermore, by removing water molecules and changing the Laplace pressure balance, it was found that the pattern contacted each other at the tip. The pattern remained in contact when water molecules were removed from the model. In the contact area, the covalent bonds, such as Si-Si and Si-O-Si, were not formed, but instead, hydrogen-to-hydrogen van der Waals bonds were formed between patterns. We calculated the total van der Waals forces between hydrogen atoms at the contact surfaces using the Hamaker equation and calculated the elastic force of the patterns using the beam deflection formula. Our calculations showed that the total van der Waals forces between hydrogen atoms at the contact surfaces were larger than the elastic force of the patterns, indicating that van der Waals forces could be a factor in maintaining the contact of the patterns.

Abstract: Thin organic self-assembled monolayer films are used to promote adhesion and seal the pores of metal oxides as well as direct the deposition of layers on patterned surfaces. Defects occur as the self-assembled monolayer forms, and the number and type of defects depend on surface preparation, deposition solvent, temperature, time and other parameters. Particles commonly deposit during organosilane self-assembly on metal oxide surfaces. The particles are defects because they are prone to react in subsequent processing, which may not be desirable if the organosilane serves as a pore sealant or passivation layer. Cleaning the organosilane by solvent extraction to remove non-polar agglomerates followed by an aqueous mixture of ammonium hydroxide and hydrogen peroxide, which is Standard Clean 1, a common particle removal step for silicon surfaces, produced monolayers with few agglomerates based on atomic force microscopy without etching the layer. The combined cleaning sequence contained fewer particles than separate cleaning steps, showing that the cleans removed particles with different compositions. The thickness and contact angle of cleaned monolayers was comparable to those made using a costlier solvent.

Abstract: Porous low-k materials used as insulator for interconnection levels in CMOS devices, are easily damaged during the patterning processes. Pore size characterization after material damage is challenging due to the chemical modification induced by the applied process. Numerical simulation of solvent adsorption on silica and functionalized silica surfaces was used to improve material pore size determination by ellipso-porosimetry, taking into account the modifications of surface/solvent interactions.

Abstract: Porous ultra low constant materials (ULK) for isolation within the interconnect system of integrated circuits are a promising approach to reduce crosstalk and RC-delays due to shrinking feature sizes [1]. Due to their porosity and the integration of carbon rich species like methyl groups into the Si-O-Si backbone of currently fabricated PECVD SiCOH dielectrics those materials are highly sensible towards plasma processing, e.g. dry etching or resist stripping [2]. Metal hard mask approaches, e.g. using TiN hard masks are widely used to prevent the resist stripping plasma directly attacking the low-k material [3]. To reduce further plasma damage like carbon depletion and formation of polar silanol groups the development of less aggressive etching processes is in the focus of research and development activities. Nevertheless dry etching will attack the sidewalls and cause a material degradation. That is why repair processes, mainly based on silylation, are considered to follow the patterning step to reintegrate carbon rich species and to recover the dielectric’s properties [3]. Subsequently to dry etching and repairing the dielectric the wet chemical plasma etch residue removal process is performed. Besides material compatibility and effectiveness in residue removal the wetting behavior of the applied cleaning solutions towards the surface which has to be cleaned is crucial, especially looking on wetting issues like the incomplete wetting of very small via holes or pattern collapse. In this study we investigate in which way different silylation based repair processing regimes are affecting the wettability of the dielectric by water based cleaning solutions using contact angle based surface energy calculations.

Abstract: In a typical Power Device on the 0.16μm node, the isolation module is one of the most critical steps. The trench to be filled in those devices is rather deep and needs a considerable amount of a suitable dielectric material. The choice of dielectric in the present paper is falling on the SubAtmosphericUndopedSilicaGlass (SAUSG oxide) ^[1].

Abstract: The interest towards Copper RDL (Re-Distribution Layer) is due to some advantages related to this approach. First of all it is cheaper than conventional Damascene approach; moreover it allows thicknesses as high as 10µm or more whereas with Damascene architecture Cu thickness is limited to <5µm. Figure 1 introduces the architecture concept, which is based on a quite long ECD growth on a substrate with patterned PhotoResist.

Abstract: GST is an alloy composed by Ge, Sb, Te whose importance is increasing more and more in semiconductors manufacturing due to its usage in Phase Change Memories (PCM) architecture, as a charge storage element. As a consequence its integration in PCM architectures requires a deeper understanding of the effect that commonly used wet cleanings may have on the surface of the alloy.

Abstract: Tungsten importance in semiconductor manufacturing is renewed more and more due to its usage not only as metallization for plugs, but also in metal gates architectures. As the scaling down of the devices is becoming aggressive, the metal interfaces become more critical. Hence, a deeper understanding of the evolution of the W surface after wet cleaning processes is becoming increasingly more important.

Abstract: Wet chemical plasma etch residue removal is a promising alternative to low-k dielectric degrading plasma cleaning processes. With decreasing feature dimensions the wetting behavior of the liquid on low energetic surfaces present after dielectric patterning will be an important issue in developing wet cleaning solutions. High surface energy liquids may not only be unable to wet low energetic surfaces, but can also cause nonwetting of small structures or pattern collapse. The improvement of the wetting behavior of a cleaning liquid by lowering its surface energy by the addition of surfactants is the strategy followed in this study. We show that with choosing the appropriate rinsing solution a wet chemical process using surfactant aided cleaning solutions compatible to the materials used in BEOL (porous low-k, copper, barriers) can be found. The results show a distinct improvement of the wetting behavior of the modified solutions on several low energetic solid surfaces like copper or polymers deposited during dry etching.