An Approach to Model Temperature Effects of Interface Traps in 4H-SiC

R. Ramakrishna Rao; S. Balaji; Kevin Matocha; Vinayak Tilak

doi:10.4028/www.scientific.net/MSF.556-557.497

Paper Titles

SIMS Investigation of Ge Incorporation in 3C-SiC Layers Grown from Ge-Si Melts
p.477

Atomic Crack Defects Developing at Silicon Carbide Surfaces Studied by STM, Synchrotron Radiation-Based μ-spot XPS and LEEM
p.481

Sodium Enhanced Oxidation of Si-Face 4H-SiC: A Method to Remove Near Interface Traps
p.487

Ab Initio Study of Clean and Hydrogen-Saturated Unreconstructed SiC{0001} Surfaces
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An Approach to Model Temperature Effects of Interface Traps in 4H-SiC
p.497

Conductive Atomic Force Microscopy Studies on the Reliability of Thermally Oxidized SiO₂/4H-SiC
p.501

Electronic Properties of Thermally Oxidized Single-Domain 3C-SiC/6H-SiC Grown by Vapour-Liquid-Solid Mechanism
p.505

Ellipsometric and MEIS Studies of 4H-SiC/Si/SiO₂ and 4H-SiC/SiO₂ Interfaces for MOS Devices
p.509

Etching of 4° and 8° 4H-SiC Using Various Hydrogen-Propane Mixtures in a Commercial Hot-Wall CVD Reactor
p.513

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An Approach to Model Temperature Effects of Interface Traps in 4H-SiC

Abstract:

In 4H silicon carbide MOSFETs, threshold voltage varies with temperature. It is believed that this is caused by trapping of inversion electrons at high density of interface-traps (Dit) present at the SiC/SiO2 interface in 4H-SiC MOSFETs. In this work, we present an approach to model the interface trap density as a function of temperature that includes the effect of band gap narrowing. Using the temperature dependent trap charge density, we can estimate the variation of mobile inversion layer charge density, which in turn, explains the threshold voltage behavior with temperature in 4H-SiC MOSFETs.