Authors: Meng Li, Sung Kwen Oh, Hong Sik Shin, Hi Deok Lee
Abstract: In this paper, Ni-silicide formed by co-sputtering of Ni and Ti on a boron cluster (BF2, B18H22) implanted ultra-shallow source/drain for MOSFET (metal oxide semiconductor field effect transistor) is proposed. Ni and Ti with a TiN capping layer were deposited by co-sputtering on boron cluster implanted wafer. By analysis of its sheet resistance, interfacial structures, surface morphological stability, and phase formation after post-silicidation annealing, thermal stability of Ni-silicide was found to be improved a lot.
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Authors: Ho Young Kwak, Hyuk Min Kwon, Sung Kyu Kwon, Jae Hyung Jang, Seung Yong Sung, Su Lim, Hi Deok Lee
Abstract: . In this paper, dielectric relaxation and reliability of high capacitance density metal-insulator-metal (MIM) capacitor using Al2O3-HfO2-Al2O3 sandwiched structure were analyzed. It is shown that multilayer MIM capacitor provides high capacitance density and low dissipation factor at room temperature. The dielectric relaxation voltage shows little dependence on the capacitor area. The capacitance density (C0) increases and quadratic voltage coefficient (α) decreases as a function of stress time under constant voltage stress (CVS) because of the charge trapping effect in the high-k dielectric.
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Authors: Hyuk Min Kwon, Sung Kyu Kwon, Woon Il Choi, Seung Yong Sung, Jong Kwan Shin, Chang Yong Kang, Raj Jammy, Hi Deok Lee
Abstract: RF characteristics of metal-insulator-metal (MIM) capacitors with SiO2/HfO2/SiO2 (SHS) were investigated using an equivalent circuit model that is associated with the main impedance ZMIM.cap and the substrate-related conductance Ysub. However, the parasitic capacitance in Ysub was lower than that of another element component in ZMIM.cap, which makes difficult for accurate RF modeling because the parasitic component was dominant at high frequency regions. As low parasitic component is eliminated from the modeling, the extracted capacitance for SHS MIM capacitor was stable up to 20 GHz. The Q-factor and resonant frequency (fr) point of SHS structure are 23.9 at 1 GHz and 9.76 GHz, respectively.
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Authors: Soon Young Oh, Jang Gn Yun, Yong Jin Kim, Won Jae Lee, Hee Hwan Ji, Ui Sik Kim, Han Seob Cha, Sang Bum Heo, Jeong Gun Lee, Yoo Jeong Cho, Gil Jin Han, Yeong Cheul Kim, Jin Suk Wang, Hi Deok Lee
Abstract: In this paper, novel Ni Germanosilicide technology using the 1%-nitrogen doped Ni and
pure Ni stack structure has been proposed for nano-scale CMOS technology. The Ni Germanosilicide
is formed on the Si0.8Ge0.2 layer which is known as an optimal composition for strained silicon
application. Proposed structure showed much better thermal stability than pure Ni case. Silicide
characteristics such as the sheet resistance, the interface uniformity of silicide/SiGe, surface
roughness, and depth profile of the Ni, Si, and Ge showed little degradation even with the high
temperature post-silicidation annealing at 600 for 30 min. Therefore, the proposed method is
highly promising for nano-scale CMOS technology.
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Authors: Kyung Min Kim, Hee Hwan Ji, In Shik Han, Seong Hyung Park, Hee Seung Lee, Young Seok Kang, Dae Byung Kim, Chang Young Lee, Ihl Hyun Cho, Sang Young Kim, Sung Bo Hwang, Jeong Gun Lee, Hi Deok Lee
Abstract: In this paper, it is presented that flicker (1/f) noise of ultra thin gate oxide can be improved
by initial oxidation and subsequent plasma nitridation(PN). PN which raises Nitrogen peak upward
from the Si/Oxide interface to gate polysilicon/Oxide interface is adopted mainly to improve the life
time such as Negative-Bias Temperature Instability (NBTI) and hot carrier in Nano CMOS
technology. Three different types of initial oxidation prior to plasma nitridation are investigated. One
is slow thermally grown oxide(STO) in very small Oxygen ambient, another is rapid thermally grown
oxide(RTO) and the other is grown in Nitrous oxygen ambient (NO). Oxide thickness of all splits is
about 14.5< Then, it is shown that STO has the lowest drain current noise power (Sid) among the
splits. The interface trap densitie (Dit) of each oxide is characterized using charge pumping method.
Finally, we reached a conclusion that the 1/f noise can be significantly reduced by initial STO and
Plasma Nitridation in Nano CMOS technology.
595
Authors: Yong Jin Kim, Chel Jong Choi, Soon Young Oh, Jang Gn Yun, Won Jae Lee, Hee Hwan Ji, Jin Suk Wang, Hi Deok Lee
Abstract: In this paper, the electrical properties of NiSi have been characterized using multi capping
layer structure for nano CMOS application. We have investigated the formation and thermal stability
of Ni silicide using Ni, Ti and TiN capping layers (Ti/Ni/TiN) as a function of Rapid Thermal
Processing (RTP) temperature. It was shown that the NiSi with multi capping layer has lower sheet
resistances than that with single capping (TiN) layer. NiSi with multi capping layer also showed much
better thermal stability. It was verified that the formation Ni-Ti-Si ternary like layer at the top region
of thhe NiSi results in improvement of thermal stability.
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Authors: Kil Jin Han, Yu Jeong Cho, Soon Young Oh, Yong Jin Kim, Won Jae Lee, Hi Deok Lee, Yeong Cheul Kim
Abstract: We investigated the effect of SiOcap layer on the thermal stability of nickel and
nickel-cobalt silicide by measuring its sheet resistance. The stability of nickel silicide was
deteriorated as a function of annealing temperature, while that of nickel-cobalt silicide was not. In
case of both silicides, the SiOcap layer improved the stability. Tensile stress from the difference of
thermal expansion coefficients between SiO2 and nickel silicide may suppress the agglomeration of
nickel silicide.
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