Papers by Author: Hiroshi Yano

Abstract: Crystallographic structures of 8H-and 10H-SiC crystals were analyzed by the Raman spectroscopy and diffraction methods. Two and four transverse-optical modes for 8H-and 10H-SiC were observed, and their values were different from those of 4H-and 6H-SiC. Crystallinity for the wide and narrow areas of these crystals was analyzed by the Laue diffraction and the transmission electron microscope, respectively. Based on these results, the stacking sequences of these polytype were discussed.

Abstract: A breakdown of a conventional trench SiC-MOSFET is caused by oxide breakdown at the bottom of the trench. We have fabricated a novel trench SiC-MOSFET with buried p+ regions and demonstrated the high breakdown voltage of 1700 V and the specific on-resistance of 3.5 mΩcm².

Abstract: Effects of combination of NO and POCl₃ annealing on electrical properties and their stability of 4H-SiC MOS capacitors and MOSFETs were investigated. Channel mobility of MOSFETs processed with both NO and POCl₃ annealing did not exceed that of POCl₃ annealed MOSFETs. As for the stability of flat-band voltage and threshold voltage using a constant field stress test, the combined annealed sample indicated very stable characteristics compared with single annealed devices with NO or POCl₃. The reason for obtaining stable electrical properties is discussed based on nitridation and phosphorization effects at the interface.

Abstract: Metal-oxide-semiconductor (MOS) capacitors with phosphorus localized near the SiO₂/SiC interface were fabricated on 4H-SiC by direct POCl₃ treatment followed by SiO₂ deposition. Post-deposition annealing (PDA) temperature affected MOS device properties and phosphorus distribution in the oxide. The sample with PDA at 800 °C showed narrow phosphorus-doped oxide region, resulting in low interface state density near the conduction band edge and small flatband voltage shift after FN injection. The interfacial localization of phosphorus improved both interface properties and reliability of 4H-SiC MOS devices.

Abstract: We have evaluated the reliability of POCl3-annealed oxides on 4H-SiC using time-zero dielectric breakdown (TZDB), constant current time-dependent dielectric breakdown (CC-TDDB), and high-frequency capacitance-voltage (C-V) measurements after electron injection. The POCl3 annealing does not deteriorate oxide breakdown field very much, still keeping an average value of larger than 9 MV/cm. However, the electron injection into POCl3-annealed oxide brings negative charges easily. From the C-V measurements, the POCl3-annealed capacitors were found to indicate a large positive flatband voltage shift after electron injection. Phosphorus atoms in the oxide may be related to the trapping site of injected electrons. The distribution and density of phosphorus in the oxide should be optimized to realize highly reliable 4H-SiC MOSFETs with high performance.

Abstract: In this article, we show some new results regarding the electrical properties of 4H-SiC MOSFETs fabricated by thermal annealing using POCl₃. The temperature dependence of MOSFET properties is described and the effect of POCl₃ annealing followed by forming gas annealing is shown. POCl₃-annealed MOSFETs indicates negative temperature dependence of channel mobility and smaller change in threshold voltage. Forming gas anneal after the POCl₃ treatment further improves channel mobility up to about 101 cm²/Vs. Features and problems of P-doped oxide are summarized and the future challenges are described.

Abstract: Relationship between the chemical reactivity and the orientation of SiC substrates was investigated. Thermal etching of 4H-SiC in the mixed gas of oxygen and chlorine was carried out as the chemical reaction. The etching rate did not change monotonously with the increase of the off angle in 4H-SiC (000-1) C substrate. By the use of such tendency in the thermal etching, the three dimensional structure with the specific pyramidal plane was able to be obtained.

Abstract: The sub-trenches in 4H-SiC Si- and C-faces could be disappeared by the thermal treatment in chlorine ambience at 900-1000oC. The surface morphologies of the thermally treated trench-sidewalls were unchanged. It is considered that the sub-trench is selectively removed because thermally Cl2 etching rate of the (0001) Si- and (000-1) C-face are different to the (11-20) and (1-100).

Abstract: We investigated electrical properties of 4H-SiC trench metal-oxide-semiconductor field-effect transistors (MOSFETs) fabricated on (000_,1) C-face substrates with various off-axis angles. Off-axis angles and directions are 4o, 8o, and 15o towards [__,1120] and 8o towards [1_,100] directions. Most trench MOSFETs showed good on-state performance. Peculiar characteristics that field-effect mobility was 103 cm2/Vs in spite of a relatively high acceptor concentration of 1 × 1017 cm−3 in the channel region were observed for trench MOSFET on 15o-off substrates. From crystallographic analysis, this face is (11_,20) with 15o off towards [000_,1] direction. We can expect that this face has quite good MOS interface properties.

Abstract: Instability of metal-oxide-semiconductor field-effect transistor (MOSFET) characteristics was evaluated by DC and pulse current-voltage (I-V) measurements. MOSFETs with nirided gate oxides were fabricated on C-face 4H-SiC. Their interfaces have near interface traps (NITs) with long time constants, depending on the cooling down process after nitridation. Such devices exhibited a large hysteresis in DC I-V and a large transient current in pulse I-V measurements. These phenomena can be explained by the charge state of NITs due to capture/emission of electrons in the channel.