Papers by Author: Jens Rip

Abstract: The cumulative installed solar power generation has been rising exponentially over the past decade. This has lead to a concomitant rise in production capabilities, leading eventually to excess production capabilities and rapid price declines per unit. In order to compete with the standard electricity generation the cost of solar panel production and installation needs to decrease even further. At the same time the solar panel and cell makers need to be able to keep a healthy margin. A crucial element in this exercise is a close control on the Cost of Ownership (CoO) of a solar cell / panel fabrication site.

Abstract: Following Moores scaling law, the transistor source and drain area become shallower and higher doped regions. As a consequence the limitations of substrate and dopant loss during cleaning become more stringent. For a better understanding, highly B, As and P doped blanket substrates, either prepared by ion implantation or by EPI growth, are studied. Substrate and dopant loss as a function of time and different HF etching conditions is monitored by Inductively Coupled Plasma Mass Spectrometry (ICP-MS) and additional techniques like Spectroscopic Ellipsometry (SE), .... It is shown that in general, the Si etching is dependent of the position of the Fermi level. More remarkably, the junction (4 nm) of a non-annealed heavily As or P doped substrate is completely removed after less than 20 min of etching in HF. This process is related to enhanced etch rates because of the amorphization of the substrate.

Abstract: Further improving complementary metal oxide semiconductor (CMOS) performance beyond the 15 nm generation likely requires the use of high mobility materials like Ge for pMOS devices. However, Ge pMOS devices made in relaxed Ge do not outperform current state of the art uni-axially strained Si pMOS devices. This explains the current interest in compressively strained Ge like bi-axially strained Ge grown on top of SiGe Strain Relaxed Buffers. From a device integration point of view, the surface smoothness of the strained Ge layer is an important parameter which has so far not widely been reported in literature, in contrast to other parameters like the material quality (crystallinity) and the threading dislocation density. In this paper we report the post-CMP and pre-epi cleans which are required to obtain contamination free SiGe surfaces to enable defect free strained Ge growth without reoccurrence of the surface roughening. We will demonstrate the epitaxial growth of fully strained 20 nm thick Ge epitaxially grown on top of SiGe Strain Relaxed Buffers with 85% Ge with a surface roughness as low as 1.6 Å (as measured on areas of 10×10 µm²).