Papers by Author: Karine Kenis

Abstract: A non-destructive metrology technique for critical dimension of Fin structure is important for better device characterization and development for improving yield. Due to extremely small dimension with high complexity in FinFET a new metrology solution needs to be evaluated. In-line atomic resolution profiler was performed to provide a suitable metrology for oxide recess metrology in Fin process. The technique could measure accurately the height and CD of Fin structures, which has the space with of 25 nm and the height of 60 nm. The uniformity of recess height could be measured, which could be interpreted by loading effect of etch process. High long term repeatability of the technique was achieved for process monitoring purpose.

Abstract: Epitaxial growth requires a clean starting surface for the growth of a high-quality crystalline layer. For epitaxy on Si, an HF-last wet clean followed by an in-situ high-temperature hydrogen bake is the reference pre-epi clean sequence to obtain an oxygen-free surface [1, 2]. The temperature required to remove all residual oxygen also makes the surface atoms mobile, resulting in reflow. The high temperatures used during the H₂-bake can also result in intolerable doping profile changes. A lower temperature pre-epi clean sequence is required to avoid this reflow, especially when moving away from Si. In addition the high temperatures needed during a H₂-bake would result in the relaxation of high mobility channels, e.g. strained Si_1-xGe_x or III-V materials [3]. Several low temperatures pre-epi cleaning solutions have been proposed in the past, e.g. GeH₄-assisted H₂-bake [4] or more recently, a GeH₄-assisted HCl clean [5]. In this study we looked at the interaction between HF-last wet clean and the in-situ GeH₄-assisted HCl clean prior to Si_0.8Ge_0.2-on-Si epitaxy.

Abstract: The cumulative installed solar power generation has been rising exponentially over the past decade. This has lead to a concomitant rise in production capabilities, leading eventually to excess production capabilities and rapid price declines per unit. In order to compete with the standard electricity generation the cost of solar panel production and installation needs to decrease even further. At the same time the solar panel and cell makers need to be able to keep a healthy margin. A crucial element in this exercise is a close control on the Cost of Ownership (CoO) of a solar cell / panel fabrication site.

Abstract: Thermal atomic layer deposition (ALD) of Al2O3 provides an adequate level of surface passivation for both p-type and n-type Si solar cells. To obtain the most qualitative and uniform surface passivation advanced cleaning development is required. The studied pre-deposition treatments include an HF (Si-H) or oxidizing (Si-OH) last step and finish with simple hot-air drying or more sophisticated Marangoni drying. To examine the quality and uniformity of surface passivation - after cleaning and Al2O3 deposition - carrier density imaging (CDI) and quasi-steady-state photo-conductance (QSSPC) are applied. A hydrophilic surface clean that leads to improved surface passivation level is found. Si-H starting surfaces lead to equivalent passivation quality but worse passivation uniformity. The hydrophilic surface clean is preferred because it is thermodynamically stable, enables higher and more uniform ALD growth and consequently exhibits better surface passivation uniformity.

Abstract: Further improving complementary metal oxide semiconductor (CMOS) performance beyond the 15 nm generation likely requires the use of high mobility materials like Ge for pMOS devices. However, Ge pMOS devices made in relaxed Ge do not outperform current state of the art uni-axially strained Si pMOS devices. This explains the current interest in compressively strained Ge like bi-axially strained Ge grown on top of SiGe Strain Relaxed Buffers. From a device integration point of view, the surface smoothness of the strained Ge layer is an important parameter which has so far not widely been reported in literature, in contrast to other parameters like the material quality (crystallinity) and the threading dislocation density. In this paper we report the post-CMP and pre-epi cleans which are required to obtain contamination free SiGe surfaces to enable defect free strained Ge growth without reoccurrence of the surface roughening. We will demonstrate the epitaxial growth of fully strained 20 nm thick Ge epitaxially grown on top of SiGe Strain Relaxed Buffers with 85% Ge with a surface roughness as low as 1.6 Å (as measured on areas of 10×10 µm²).

Abstract: With the continuous decrease of feature size of semiconductor devices new process related challenges must be overcome continuously. One of the key issues for technology development is to have the proper metrology in place to evaluate the myriad process steps fast and accurately. Sometimes the mere existence of a particular metrology is not enough because of cost and throughput issues. The goal of this paper is to show that simply by monitoring the background signal of a light scattering tool, certain process optimizations and monitoring can be done much faster while bringing down the cost significantly. We focus particularly on post I/I strip optimization in this paper.

Abstract: High velocity aerosol cleaning using ultrapure water or dilute aqueous solutions (e.g. dilute ammonia) is common in semiconductor IC fabrication [1]. This process combines droplet impact forces with continuous liquid flow for improved cleaning efficiency of sub-100nm particles. As with any physically enhanced cleaning process, improved particle removal can be accompanied by increased substrate damage, especially to smaller (<80nm) features [2]. Solvents such as N-methylpyrrolidone (NMP) and tetrahydrofurfuryl alcohol (THFA) are used for resist strip applications [3]. It is possible, and sometimes useful, to deliver these solvents through the same spray nozzle normally used for aqueous spray cleaning. In this presentation we explore the particle removal and substrate damage performance of 2-ethoxyethanol (EGEE), NMP and THFA as used in a conventional aerosol spray cleaning system

Abstract: The local particle removal efficiency (PRE) of nano particles in megasonic cleaning experiments is studied. This approach makes it possible to quantify non uniform cleaning effects over the wafer and to look into the dynamics of particle removal at different areas on the wafer. A direct correlation between PRE and megasonic induced damage of device structures demonstrates that a considerable amount of damage is already formed at less efficiently cleaned areas of the wafer.

Abstract: With the continuous shrinkage of critical sizes in semiconductor manufacturing, nano-particles smaller than 100-nm are becoming a potential threat to devices in chips. Storage of wafers contaminated during process steps often results in a decrease of particle removal efficiency in subsequent clean, a phenomenon referred to as aging. In this work, the influence of aging on the removal of silica and silicon nitride nano-particles from hydrophilic Si wafers was studied for different storage conditions. Trends observed for aging as a function of particle size and for different tools indicated that aging will become an issue for critical cleans where substrate etching must be kept very low and the physical component of the clean must be decreased to prevent damage to fine structures. Controlling the relative humidity during storage helped in lowering the effect of aging.

Abstract: In this work the removal of different metallic and particulate contaminants relevant for high-k/metal gate processing is studied. Best cleaning efficiency of both silicon and nitride substrates is achieved using a HF/HNO3-based cleaning resulting in a particle removal efficiency higher than 90% and metal removal down to 1010 at/cm2.