Papers by Author: Per Ericsson

Abstract: In 3C-SiC MOSFETs, planar defects like anti-phase boundaries (APBs) and stacking-faults (SFs) reduce the breakdown voltage and induce leakage current. Although the planar defect density can be reduced by growing 3C-SiC on undulant-Si substrate, specific type of SFs, which expose the Si-face, remains on the (001) surface. Those SFs increase the leakage current in devices made with 3C-SiC. In order to eliminate the residual SFs, an advanced SF reduction method involving polarity conversion and homo-epitaxial growth was developed. This method is called switch-back epitaxy (SBE) and consists of the conversion of the SF surface polarity from Si-face to C-face and following homo-epitaxial growth. The reduction of the SF density in SBE 3C-SiC results in a tremendous improvement of the device performance. The combination of the achieved blocking voltage with the demonstrated high current capability indicates the potential of 3C-SiC vertical MOSFETs for high and medium power electronic applications such as electric and hybrid electric vehicle (EV/HEV) motor drives.

Abstract: Vertical DMOSFET devices with varying size from single cell to 3x3 mm2 large devices have been realized. The investigated devices had hexagonal and square unit cell designs with 2 $m and 4 $m channel length. The p-body was aluminum implanted and the source was nitrogen or phosphorus implanted. Low temperature Ti/W contacts were evaluated.

Abstract: Lateral MOSFET devices with varying size from a single unit cell to 3x3 mm2 containing 1980 unit cells have been realised using two basic technologies; lateral trench MOSFET (LTMOS) with epitaxially grown source and drain, and lateral MOSFET with lightly doped drain (LDDMOS) having implanted source and drain regions. The LDDMOS devices had blocking capability of 100 V and the channel mobility in the range of 10 cm2/Vs in {-110} current flow direction and of 5 cm2/Vs in {110} current flow direction. The properties of both fabricated MOSFET types, LTMOS and LDDMOS, are dominated by a high density of interface states of the order of 1×1013 cm-2eV-1. Both the drain current and the leakage current scale linearly with the device size up to the maximum investigated device size of 3x3 mm2. No size limiting defects have been observed contrary to what is often the case in 4H-SiC material.