Papers by Author: Wook Bahng

Abstract: We investigated how surface roughness, intentionally induced by chemical-mechanical polishing, affects the formation of ohmic contacts to an n-type 4H-SiC using a common circular transmission length method (CTLM). Nickel metal was used as the cathode ohmic contacts to n-type SiC. The specific contact resistance (SCR) for the un-polished sample (F1) and polished samples (F2 and F3) was 5.4 × 10-3
⋅cm2 and 4.2 × 10-3
⋅cm2, respectively. We found out that the un-polished sample (F1) had much higher SCR than the samples , F2 and F3. In addition, we did not see any difference between the differently polished samples, F2 and F3, indicating that there was no dependence on the face type of SiC (Si- or C-face) in the values of SCR. We also investigated the die-bonding processes with the surface roughness and metallization schemes' effects.

Abstract: We have fabricated advanced metal-oxide-semiconductor (MOS) capacitors with ultra thin (5 nm) remote-PECVD SixNy dielectric layers and investigated electrical properties of nitrided SiO2/4H-SiC interface after oxidizing the SixNy in dry oxygen at 1150 °C for 30, 60, 90 min. Improvements of electrical properties have been revealed in capacitance-voltage (C-V) and current density-electrical field (J-E) measurements in comparison with dry oxide. The improvements of SiC MOS capacitors formed by oxidizing the pre-deposited SixNy have been explained in this paper.

Abstract: We have investigated the electrical properties of metal-oxide-semiconductor (MOS) capacitors with atomic-layer-deposited La2O3, thermal-nitrided SiO2, and atomic-layer-deposited La2O3/thermal-nitrided SiO2 on n-type 4H-SiC. A significant reduction in leakage current density has been observed in La2O3 structure when a 6-nm thick thermal nitrided SiO2 has been sandwiched between the La2O3 and SiC. However, this reduction is still considered high if compared to sample having thermal-nitrided SiO2 alone. The reasons for this have been explained in this paper.

Abstract: We have investigated the influence of surface modification on the electrical properties of SiC diodes. Schottky diodes (SBDs) as well as PiN diodes were fabricated on n-type SiC substrate with an epilayer, and electrically characterized before and after high temperature annealing, and after removing the surface modified layer, respectively. The devices annealed without graphite cap layer showed ohmic behavior. The surface layer was modified to a conductive layer possibly due to the preferred sublimation of Si species. In order to confirm the existence of modified surface conductive layer, diode was fabricated on the same substrate and electrically characterized after removing 30nm-thick damaged layer by ICP-RIE. The leakage current reduced dramatically, as much as 7 orders of magnitude. The PiN diodes fabricated on the damaged surface layer showed the reverse leakage current and the breakdown voltage of 50mA and 1250V, respectively. While those of the diode fabricated after removing the damaged surface layer were 200nA at the breakdown voltage of 2100V, respectively.

Abstract: We report on the die bonding processes and how the surface roughness and metallization schemes affect the processes of die bonding in 4H-SiC device fabrication using a soldering test and die shear test (DST) with differently prepared 4H-SiC samples. The first set of samples (FZ#1 and FZ#2) was capped with sequentially evaporated Ti and Au on an annealed Ni layer. The second set of samples (FZ#3 and FZ#4) and the third set of samples (FZ#5 and FZ#6) were prepared by 4μm-thick Au electroplating on an annealed Ni layer and an un-annealed Ni layer, respectively. The quality of the soldering, such as the solder coverage, void, and adhesion, was characterized by optical microscope, X-ray microprobe, and DST. We found that the samples (FZ#4 and FZ#6) deposited by Au electroplating on C-face (bottom-side) 4H-SiC provided a satisfactory result for the tests of solder coverage, void, and DST and also realized the cleaning process prior to the electroplating and soldering was the most crucial in the die packaging processes of vertical structure devices. The void fraction measured by X-ray microprobe for the samples, FZ#4 and FZ#6 was 2.2% (average for 5 samples) and 0.8% (average for 3 samples), respectively.

Abstract: The initial homoepitaxial growth behavior on nearly on-axis 4H-SiC substrates was investigated. We have observed circular etch pits on the surface of on-axis substrate in the presence of source gases. However, there were no circular etch pits on the surface of off-axis substrates. In addition, the surface etched by H2 gas did not show circular etch pits even on nearly on-axis substrates. The shape of the circular etch pits was similar to spiral one. The initial growth behavior of epilayers was also investigated with various C/Si ratios of source gases (0.6

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