Authors: Suguru Saito, Atsushi Okuyama, Kenji Takeo, Yoshiya Hagimoto, Hayato Iwamoto
Abstract: We investigated the effect of Si wet etching on the vertical step at wafer edge. We found that the concave-convex shape appeared at the wafer edge after Si etching by the Atomic Force Microscopy analysis. From the liquid simulation and the detailed evaluation of Si etching rate, we revealed that the concave-convex shape was formed by the distribution of the fluid velocity at the wafer edge.
97
Authors: Atsushi Okuyama, Suguru Saito, Yoshiya Hagimoto, Kenji Nishi, Ayuta Suzuki, Takayuki Toshima, Hayato Iwamoto
Abstract: The microminiaturization of semiconductor devices has made it necessary to control the wet etching process on the nanometer order. It is therefore extremely important to understand wet etching reactions in the nanoscale region of solid-liquid interfaces, in order to assist in optimizing process conditions to satisfy the severe demand for semiconductor devices. Simulations performed to analyze the behavior of liquid molecules in the nanoscale region have been reported [1], but there have been few reports of detailed experimental results. We here report detailed experimental results on the wet etching behavior of SiO2 film in the nanoscale region between Si materials.
115
Authors: Yoshiya Hagimoto, Hayato Iwamoto, Yosuke Kawabuchi, Teruomi Minami
Abstract: High-performance drying techniques using IPA (isopropyl alcohol) are widely used in the silicon wafer cleaning process. IPA-based drying techniques help prevent the formation of watermarks because they effectively displace any water remaining on a wafer surface. They are thus frequently used in the single wafer cleaning system for advanced devices in which ultra-clean process performance is required. However, as devices are becoming physically smaller, the formation of extremely small defects during cleaning has become a serious problem. It is therefore important to elucidate the mechanism of the defect formation and to take measures to prevent it for future device technologies in which small-size defects can be killer defects during production. In this paper, we performed experiments focused on the process chamber atmosphere in IPA drying of the single wafer cleaning system and describe the mechanism of the defect formation.
231
Authors: Yoshiya Hagimoto, Tomoki Tetsuka, Hayato Iwamoto, Hironobu Hyakutake, Hiroshi Tanaka
Abstract: Displacing the water remaining on a wafer surface by using condensed IPA improves the effectiveness of IPA-based drying techniques. Although this drying technology has been used for years, recent device technologies have needed extremely high-performance drying processes. We characterized an IPA adsorption phenomenon on a wafer surface by using the batch cleaning system and determined the appropriate drying conditions. Our results revealed that the IPA supply rate had a great influence on watermark formation. This can be prevented by increasing the IPA supply rate because the rapid increase of IPA concentration in the remaining water on wafer surface suppresses the dissolution of silicon into water. Through both understanding of an IPA adsorption on a wafer surface and control of the drying condition, an ultra-clean and IPA-saving drying process with a watermark-free performance for future device technologies can be achieved.
79
Authors: Suguru Saito, Yoshiya Hagimoto, Hayato Iwamoto, Yusuke Muraki
Abstract: Recently, plasma-less gaseous etching processes have attracted attention for their interesting etching properties. Previously, we reported on the etching properties of theses processes for various kinds of oxides and revealed that they reduce the etch rate of the chemical-vapor-deposited (CVD) oxides more than the conventional wet etching process does [1]. Our results also revealed that depressions called divots in the CVD oxide of the shallow trench isolation (STI) became smaller in size by substituting a plasma-less gaseous etching process for the conventional wet etching process. In semiconductor manufacturing, many processes are used to remove oxides damaged during ion implantation or reactive ion etching on the device surface. Therefore, it is very important to understand the etching properties of plasma-less gaseous etching processes for damaged oxides as well as those for other kinds of oxides. In this report, we evaluate the etching properties of one particular plasma-less gaseous etching process for oxide films damaged during the ion implantation process under various conditions and discuss the mechanism of interesting etching properties for the damaged oxides.
227
Authors: Yoshiya Hagimoto, Hayato Iwamoto, Yasushi Honbe, Takuro Fukunaga, Hitoshi Abe
Abstract: While batch wafer cleaning processes have been conventionally used in the semiconductor manufacturing for many years, the use of single wafer cleaning processes in the manufacturing has recently become increasingly widespread. Single wafer cleaning processes have the advantages of reducing particle and metal contamination, however, electric charge or electrostatic discharge phenomena occurring in these processes causes serious problems such as device destruction through insulation failure and circuit disconnection [1,2]. Well-known examples are the breakdown of the ultra-thin gate oxide and the dissolution of Cu wiring due to charging-up damage in de-ionized water rinsing, which occur during the single wafer wet cleaning process in semiconductor manufacturing. We investigated the problem of wafer defects caused by electrostatic discharge and characterized them using transmission electron microscope (TEM) and energy dispersive X-ray (EDX) analyses.
185
Authors: Yoshiya Hagimoto, Hajime Ugajin, Daisuke Miyakoshi, Hayato Iwamoto, Yusuke Muraki, Takehiko Orii
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