Papers by Keyword: Bevel

Abstract: High-k gate dielectrics and metal gate electrodes have become essential for emerging device technologies because they enable the continuous scaling down of devices while maintaining a high performance [. However, since they are composed of novel metallic elements that have never before been used in conventional processes, special care must be taken when handling these materials in the production line. In particular, cross-contamination that occurs due to transporting contamination via processed wafers can cause serious problems such as deterioration of device properties and yield loss [. The process of cleaning the backside and bevel of a wafer is now increasingly important for avoiding these problems. To date, there has been no detailed evaluation of contamination removal on various films performed for elements such as hafnium, which is one of the key elements in high-k/metal gate technologies. In this study, we evaluated hafnium contamination on three types of wafer surface after the cleaning process and investigated the cause of different residual amounts of hafnium contamination on the different wafers.

Abstract: Diagnostic FDM-A method [2] based on a measurement of frequency modulation of a pulsation component as well as FAM-C method based on a measurement of a alternating current’s frequency have been developed in Air Force Institute of Technology. These methods provide to define a level of a sub-assembly’s abrasive wear and its localization during normal work of a power unit. It is possible to define numerous parameters of bearings and their kinematics pairs as well as a rotor assembly. They are: a level of a bearing rolling friction, smoothness of a bearing cage’s motion, a quantity of a radial clearance. It also provides to detect resonances in elements as well as observe a shape and a relative height of characteristic patterns, from which it is possible to calculate, among others, a quantity of a mechanical quality factor of a kinematics pair – it is possible to define an operating time reserve of the kinematics pair to resonance.

Abstract: In the semiconductor industry, the edge exclusion of processed wafers is decreasing to accommodate more integrated circuits. With this trend, there is a higher risk of detrimental contamination at the wafer edge and bevel making the monitoring for metallic contamination in these areas critical. Cross contamination from the edge and bevel can occur at many processing steps. For example, metals can spread from the wafer edge, bevel and backside to the wafer’s surface in a wet cleans process. In immersion lithography, the water drop that is scanned across the wafer could transport contamination from the edge and deposit it across the wafer surface. Contamination on wafer edge and bevel can have many origins; handling systems in every process tool, reaction products in etching, and residuals of new materials in high-k for CVD and PVD, for example. To know what metallic contamination is present, and to investigate the causes are essential for wafer edge control.