Authors: Pei Sheng Liu, Long Long Yang, Jin Xin Hang, Ying Lu
Abstract: Electro-migration has become a critical reliability issue for high density solder joints in flip chip technology, especially for current crowding and joule heat. Electro-migration force and mean time to failure of flip chip are introduced in this paper. This study employs two-dimensional simulation to investigate the distribution of current density and Joule heating in the flip chip joint. It is found that current crowding and Joule heat effect are very serious in the solder bump. The Joule heat may play important role in the void formation and thermo-migration in solder bump. And the factors that impact the distribution of current density and Joule heat are studied. The results show that the thickness of Al and UBM has great influence on the distribution of current density and Joule heat.
319
Authors: Lu Fan Zhang, Zhi Li Long, Ji Wen Fang, Jian Dong Cai, Long Sheng Nian
Abstract: XY motion platform in flip chip machine plays a key module to achieve precise positioning in the process of flip chip packaging. The paper presents an XY motion platform structure. The static and modal characteristics of the XY motion platform were calculated by finite element method, and then some important conclusions were obtained. The displacement and stress distribution of XY motion platform were disclosed. The relevant change trends of displacement and stress under the different load were investigated and the first four natural vibration modes of the XY motion platform were obtained. In the experiment, the vibration behavior was measured by a non-contact laser measuring device. The experiments verify the correctness of the simulation of the XY motion platform. These results can help improve the reliability of the XY motion platform.
7
Authors: Jun Chao Liu, Tie Lin Shi, Ke Wang, Miao Zeng, Guang Lan Liao
Abstract: Flip chip technology is one of the fastest growing segments of microelectronics packaging because of its ability to satisfy the increasing demands of high input/output density, package miniaturization, and reduced cost. A critical element in the successful application of flip chip technology is the reliability of solder bumps. In this paper, a nondestructive inspection method combining ultrasonic excitation with modal analysis is proposed for flip-chip solder bump defect detection. The signal generator and power amplifier are utilized to drive the capacitive air-coupled ultrasonic transducer to produce continuous ultrasonic waves for exciting the test chips. The vibration velocities of the chips are measured by the laser scanning vibrometer to extract the modal shapes and resonance frequencies. The results prove that the defective chips can be distinguished from the good chip by the modal shapes, and the resonance frequencies of the chips decrease with the increase of the open solder bumps. Therefore, this detection method may provide a new path for the improvement and innovation of flip chip on-line inspection systems.
2104
Authors: Yong Cheng Lin, Hao Jin, Xiao Nan Fang, Jun Zhang
Abstract: Polymer-based anisotropic conductive film has become widely used in many electronic packaging interconnect applications. In this study, thermosonic flip chip bonding technology for anisotropic conductive film (ACF) joints of chip-on-glass (COG) assembly is investigated. The effects of ultrasonic power on the curing degree and bonding strength of anisotropic conductive film joints are discussed. The results show that (1) The bonding strength of the ACF joints firstly increases and then fast decreases when the ultrasonic power is continuously increased; (2) The curing degree of ACF material increases with the increase of the ultrasonic power. When the ultrasonic power is 3.52W, the curing degree of ACF material can reach 94.1%; (3) The optimized value of ultrasonic power is 3.5W for the studied assembly.
3466
Authors: Yu Dong Lu, Xiao Qi He, Yun Fei En, Xin Wang, Zhi Qiang Zhuang
Abstract: Both Al interconnects and flip-chip solder bumps were sensitive to high current. The failure mechanism of circuits interconnects would be more complicated if the current density in circuits was exceed the critical magnitudes of electromigration in both Al interconnects and solder bumps. The failure of circuit interconnects under different magnitudes of current density was studied and the interaction of electromigration in solder bumps and Al interconnects was discussed. The circuit interconnects of flip chip show three failure phenomena under high current density: voids in Al final metal, inter-diffusion of Al and SnPb, and melting of solder bumps. The voids in Al metal show the directional diffusion of Al atoms was mainly controlled by the electron wind fore. However the inter-diffusion of Al and SnPb demonstrated the electron wind force to Sn and Pb atoms would be ignored in contrast with chemical potential gradient or intrinsic stress. The flow of Sn and Pb atoms under high current density was in opposite direction with electron wind force and uniform with chemical potential gradient.
449
Authors: Yong Cheng Lin, Jing Hong Lu, Jun Zhang
Abstract: Fatigue failure of solder joints is a serious reliability concern in area array technologies. A non-linear finite element model was made to study the effects of underfill material and substrate flexibility on solder joint thermal fatigue. Accelerated temperature cycling loading was imposed to evaluate the reliability of solder joints in test flip chip assembly. The results show that the underfill material and substrate flexibility can improve the distribution of stress/strain and reduce the magnitude of stress/strain in the solder joints. Therefore, the reliability of solder joints under thermal cycling condition can be enhanced by applying underfill material and selecting the Flex substrates during temperature cycling.
3963
Authors: Yu Dong Lu, Xiao Qi He, Yun Fei En, Xin Wang
Abstract: In advanced electronic products, electromigration-induced failure is one of the most
serious problems in fine pitch flip chip solder joints because the design rule in devices requires high
current density through small solder joints for high performance and miniaturization. The failure
mode induced by electromigration in the flip chip solder joint is unique, owing to the loss of under
bump metallurgy (UBM) and the interfacial void formation at the cathode contact interface. In this
study, Electromigration of flip chip solder joints has been investigated under a constant density of
2.45×104 A/cm2 at 120 °C. The in-situ marker displacements during the electromigration test was
measured and found to show a rough linear change as a function of time. Scanning electron
microscopic images of the cross section of samples showed the existence of voids at the interface
between Al interconnection and under bump metallurgy. The void movement was matched with the
marker displacements during the electromigration test, and voids moved to the cathode interface
between Al interconnection and under bump metallurgy in the downward electron flow (from chip to
substrate) joint. The mechanism of electromigration-induced void migration and failure in the flip
chip are discussed. During electromigration, a flux of atoms is driven from the cathode to the anode or
a flux of vacancies in the opposite direction. It can lead to two possible mechanisms of void
migration. First, if we regard the void as a rigid marker of diffusion, it will be displaced towards the
cathode by the atomic flux in the electromigration, Second, if we consider surface diffusion on the
void surface, electromigration will drive atoms on the top surface of the void to the bottom surface of
the void, and consequently the void will move towards the cathode.
905
Authors: Boo Yang Jung, Eun Kyoung Choi, Young Soo Jeon, Kwang Yong Lee, Kwang Seok Seo, Tae Sung Oh
Abstract: For flip-chip process of RF system-on-packages(SOP), double bump bonding processes
were investigated. Sn-Ag and Sn solder joints were formed by the reflowed double bumping process,
and Sn/In/Sn bump joints were fabricated by the non-reflowed double bump bonding process. The
height-to-size ratios of 0.78 and 0.65 were obtained for the reflowed double bumping and the
non-reflowed bumping, respectively. Average contact resistance of the reflowed Sn-Ag and Sn solder
joints was about 13m/ which was much lower than 24~33m/ of the non-reflowed Sn/In/Sn bump joints.
The reflowed solder double bumping method is more suitable for flip-chip process of RF-SOP than the
non-reflowed double bump bonding.
25
Authors: Ja Myeong Koo, Dea Gon Kim, Seung Boo Jung
Abstract: The interfacial reactions and shear properties of Sn-37Pb (wt.%) solder bumps with two
different under bump metallizations (UBMs), Cu and Ni, were investigated after high temperature
storage (HTS) tests at 150 C for up to 65 days. Two different intermetallic compounds (IMCs),
Cu6Sn5 and Cu3Sn, were formed at the bump/Cu interface, whereas only a Ni3Sn4 IMC layer was
formed at the bump/Ni interface. The thicknesses of these IMCs increased linearly with the square
root of duration time. The IMC growth rate at the bump/Cu UBM interface was much greater than that
at the bump/Ni UBM interface. The shear properties of the bumps with the Cu UBM were greatly
decreased with increasing duration time, compared with those with the Ni UBM.
5
Authors: Dae Gon Kim, Jong Woong Kim, Sang Su Ha, Ja Myeong Koo, Bo In Noh, Seung Boo Jung
Abstract: Thermo-mechanical reliability of the solder bumped flip chip packages having underfill
encapsulant was evaluated with thermal shock testing. In the initial reaction, the reaction product
between the solder and Cu mini bump of chip side was Cu6Sn5 IMC layer, while the two phases which
were (Cu,Ni)6Sn5 and (Ni,Cu)3Sn4 were formed between the solder and electroless Ni-P layer of the
package side. A crack was formed at the upper edge region of solder bump, and propagated through
the solder region. The primary failure mechanism of the solder joints in this type of package was
confirmed to be thermally activated solder fatigue failure. After thermal shocks of 2000 cycles, one
more crack which was not observed in the case of non-underfill encapsulated flip chip was observed
at the left side of interface between solder bump and substrate. The addition of this crack formation
should be due to the underfill encapsulation between the Si chip and substrate.
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