Papers by Keyword: Integrated Circuits

Abstract: We demonstrate that a uniform recess of polycrystalline Mo can be achieved using a two-step method: metal oxidation with isotropic oxygen plasma that forms a layer of MoO₃ and selective etching of this oxide layer. The oxidation step fully defines the recess depth, and its uniformity is ensured by the low facet dependence of plasma oxidation. We have extensively studied the oxidation of patterned Mo nanowires (30 nm width) in isotropic oxygen plasma and achieved uniform oxide layers of predefined thickness by controlling radio-frequency (RF) power, gas pressure, and exposure time. We showed that using highly selective oxide etching, we can perform multiple etching cycles with a typical etch rate of 1-2 nm per cycle, depending on the RF power. Due to plasma isotropy, this approach can be implemented for a controlled uniform etching of large vertical stacks of metal nanostructures.

Abstract: An automatic equipment for measurement of voltage-current characteristic of semiconductor devices was described. The technique for precision voltage setting, which enables to obtain ±1mV accuracy in ±10V range, was described. Logarithmic current sensors were used for measurements of the current and calibration technique of the sensors was presented. It provides relative accuracy 1% in wide current range (0,1nA..10mA).

Abstract: Ionizing radiation impact leads to degradation of electrical parameters of microelectronic devices. It is necessary to take this fact to account when dealing with microcircuits for space applications and high energy physics. Main physical reason of radiation-induced failures of spaceship and front end electronic equipment is buidup of interface traps at Si-SiO₂ interface in semiconductor transistor structures. The original mechanism of interface trap annealing based on radiation induced charge neutralization (RICN) effect is presented. It is supposed that the positive charge of trapped holes in oxide is transformed through electron capture into a new defect (the AD center). The AD centers act as interface traps. The appearance of the A^–D⁺ state leads to the annihilation of the AD center or annealing of interface trap. The annihilation process can be stimulated by radiation induced or substrate electrons. The competitive between accumulation and annihilation processes leads to saturation of the interface trap buildup. The value of density of interface trap in saturation depends on product of interface trap accumulation rate (K_acc)_it and constant K_AD which is function of thermal velocity, capture cross-section of AD center, generation rate and electron yield of radiation induced electrons. The extraction of these parameters allows explaining a known experimental data. The alternative mechanism of the interface trap saturation connected with the exhaustion of initial interface trap precursors is considered.

Abstract: An efficient methodology of electro-thermal design of smart power semiconductor devices and ICs, based on the combined use of SPICE circuit analysis tool and software tools for 2D/3D thermal simulation of IC chip construction, is presented. The features of low, medium and high power elements, temperature sensors, IC chips simulation are considered.

Abstract: SiC, a wide band gap semiconductor, is capable of robust operation at temperatures well above 600°C. SiC bipolar transistors are well suited for applications at high temperatures as, unlike MOSFET, it does not have a critical gate oxide, and hence oxide reliability at high temperatures is not an issue. In this paper, the design of optimized emitter coupled logic technology circuits using 4H-SiC bipolar transistors is presented. The circuits work over a wide range of temperatures and power supply voltages at high speeds, demonstrating the potential of robust high speed ECL integrated circuits in SiC for small-scale logic applications.

Abstract: Due to our demonstrated stable Tungsten-Schottky barrier at elevated temperatures, and also thanks to our technological process maturity regarding SiC-Schottky contact fabrication, we have implemented the digital logic gates library adopting a normally-on MESFET topology. In this paper we present new experimental results showing the thermal behavior up to 300oC of 4H-SiC logic gates library, monolithically integrating normally-on MESFETs and epitaxial resistors. The implemented SiC devices are based on important CMOS features and are specially designed for large ICs device integration density.

Abstract: This paper updates the long-term 500 °C electrical testing results from 6H-SiC junction field effect transistors (JFETs) and small integrated circuits that were introduced at ICSCRM-2007. Two packaged JFETs have now been operated in excess of 7000 hours at 500 °C with less than 10% degradation in linear I-V characteristics. Several simple digital and analog demonstration integrated circuits successfully operated for 2000-6500 hours at 500 °C before failure.

Abstract: Requirements and applications for three different scenarios in material science of microelectronics are discussed. Dimension scaling continous at the same pace (More Moore) by changing to immersion lithography and later to extreme ultraviolet lithography. The functionality of system on chip solutions will be increased by heterogeneous technologies combined with a microelectronics core ( More than Moore). Material science and physical understanding of new device principles started well in advance to judge difficulties and options. The strong links to economy are illustrated by a simple model of exponential growth.

Abstract: Microelectronics is a central area within information technology, which is still one of the most important global technologies. It will be shown that the development of integrated circuits is based on a long and fascinating history, which is unique in modern time. Yet, the fantastic growth in semiconductor electronics is due to a unique combination of basic conceptional advances, the perfection of new materials and the development of new device principles. A brief survey of the development of microelectronics is given by not only focusing on the history of microelectronics but also taking into account materials and market aspects. Since microelectronics is an extremely complex area, a few criteria and reference points for integrated circuits are given. Thereafter, some examples are presented indicating the rapidly changing state-of-the-art. It will be shown that the development of material science within the area of microelectronics is not always driven by scientific curiosity but often by arbitrary and not always obvious preferences. After a short discussion of the performance advantages and disadvantages of germanium, silicon and III-V compound semiconductors, the SiGe heterojunction bipolar transistor is taken as an example for demonstrating a few important differences in the performance of all-silicon devices with regard to silicon-based heterojunction devices in general. In conclusion, the impact of human enterprise and research policy on the development of microelectronics is briefly discussed.

Abstract: As silicon ICs continue to scale down, several reliability issues have emerged. Electromigration- the transportation of metallic atoms by the electron wind- has been recognized as one of the key damage mechanisms in metallic interconnects. It is known that there is a threshold current density of electromigration damage in via-connected lines. The evaluation of the threshold current density is a matter of the great interest from the viewpoint of IC reliability. In this study, Al polycrystalline lines with two-dimensional shape, i.e. angled lines are experimentally treated for the evaluation. Comparing the experimental result with that of straight-shaped line, the effect of line-shape on the threshold current density of electromigration damage is discussed.