Papers by Keyword: Replacement Gate

Abstract: Beginning at the 45nm node, the semiconductor industry is moving to high-k gate dielectrics and metal gate electrodes for CMOS logic devices [. Although different approaches of building these devices are being pursued, most of the industry has consolidated behind a gate last approach, in which the transistor is built around a dummy poly polysilicon gate, which is subsequently removed and replaced with a metal gate. Current approaches to removing the dummy poly gate include plasma-based dry processes and liquid-phase wet etching.

Abstract: We report in this work some process optimization effort in performing poly silicon removal for replacement gate process integration. Successful wet poly silicon removal after dummy gate patterning is not only conditioned by suitable process conditions during wet removal but is also impacted by process steps prior to gate removal A thorough evaluation of the impact on poly removal from dopants or contaminants introduced in the poly silicon by previous processing is done, resulting in an optimized integration flow with successful poly removal. This work also shows that use of diluted TMAH chemistry instead of diluted ammonia in performing poly silicon removal provides better ability in removing poly silicon especially in narrow gate structures.