Papers by Keyword: SiC Epitaxy

Abstract: Recent advances in SiC MOSFET technology allow significant reduction of on-state resistance of the active transistor cell, increasing thus relative contribution of the drift region comprised typically from epitaxial layer or stack thereof. Tight process control of thickness and doping of epitaxial layers is therefore gaining increasing importance. This paper summarizes some key factors and features of four state-of-the-art SiC epitaxial platforms and their impact on achievable epi parameters and wafer throughput.

Abstract: The benefits of SiC devices for use in power electronics has been long understood, and over 25 years of sustained development in materials and devices has brought adoption to a tipping point [1,15]. It takes the confluence of many separate developments to build the necessary momentum for accelerated adoption, and we will examine these factors.

Abstract: We present results on the homo-epitaxial growth on the Si face of 100 mm and 150 mm (0001)-oriented (4° off-orientation) 4H SiC wafers utilizing the horizontal hot-wall batch reactor Probus-SiC^TM from Tokyo Electron Limited. Standard epitaxial growth processes show very high levels of intra-wafer, intra-run wafer-to-wafer, and run-to-run uniformities in the layer thickness as well as in the n-type doping concentration. N-type background doping levels less that 5e13 /cm³ have been reached. AFM measurements reveal a surface roughness of 0.2nm (rms). The density of epitaxy related defects such as triangular defects, carrots, and ingrown particles due to downfall are very low, as confirmed by high blocking yields.

Abstract: Latest results are presented for SiC-epitaxial growths employing a novel 6x150-mm/10x100-mm Warm-Wall Planetary Vapor-Phase Epitaxial (VPE) Reactor. The increased throughput offered by this reactor and 150-mm diameter wafers, is intended to reduce the cost per unit area for SiC epitaxial layers, increasing the market penetration of already successful commercial SiC Schottky and MOSFET devices [1]. Increased growth rates of 30-40 micron/hr and short <2 hr fixed-cycle times (including rapid heat-up and cool-down ramps), while maintaining desirable epitaxial layer quality were achieved. Increased quantities of 150-mm epitaxial wafers now allow statistical analysis of their epitaxial layer properties. Specular epitaxial layer morphology was obtained, with morphological defect densities <0.4 cm^-2, consistent with projected 5x5 mm die yields averaging 93% for Si-face epitaxial layers between 10 and 30 microns thick. Intrawafer thickness and doping uniformity are good, averaging 1.7% and 5.1% respectively. Wafer-to-wafer doping variation has also been significantly reduced from ~12 [5] to <3% s/mean. Initial results for C-face growths show excellent morphology (97%) but poor doping uniformity (~16%). Wafer shape is relatively unchanged by epitaxial growth consistent with good epitaxial temperature uniformity.

Abstract: Results are presented for epitaxial SiC layers grown on 100 mm and 150 mm wafers suitable for power devices by CVD using a VP2800WW multi-wafer reactor with 10×100mm and 6×150mm configurations. We have demonstrated continuous improvement in uniformity for thickness and doping, as well as in defect reduction in standard epitaxy on 100 mm wafers. Thickness and doping sigma/mean values of <1.5% and <8%, respectively, could be routinely achieved. Doping and thickness measurements of 30 μm layer growth show results similar to standard epilayer growth. The averaged projected site yields of 80% for 5x5 mm² and of 96% for 2x2 mm² correspond to a low epitaxial defect density of <1 cm="" sup="">-2 in 30μm thick epilayers. Epilayer structures for bipolar devices like PiN diodes and BJTs are shown. The interface regions between nitrogen doped and aluminum doped layers show an abrupt transition of dopant concentration. Wafer quality of 100 mm and 150 mm material is presented as an important base factor for excellent epitaxial layer quality. It is shown that 150 mm substrates exhibit TSD and BPD densities very similar to the 100 mm materials. Site counts for TSDs and BPDs on sample wafers show dislocations densities of 500 cm^-2 and 300 cm^-2, respectively. After CVD process optimization, a thickness uniformity (sigma/mean) of <1.5% and a doping uniformity of <13% was achieved on epitaxial layers on 150mm.

Abstract: Suppression of basal plane dislocations (BPDs) from critical epitaxial drift layer has occurred mainly by converting BPDs in the substrate into threading edge dislocations before the BPDs enter the drift layer. As optimized epitaxial growth has produced drift layers free of BPDs originating from the substrate over a large fraction of the wafer, other sources of BPDs have become important. One source of BPDs introduced during epitaxial growth is from inclusions, which mainly consist of misoriented 4H-SiC. Inclusions are surrounded by a local cluster of BPDs and in thick, low-BPD epitaxy the outermost BPDs glide centimeters from the inclusion forming a much larger damaged area. The details of BPD migration from inclusions are discussed.

Abstract: Initial results are presented for SiC-epitaxial growths employing a novel 6x150-mm/10x100-mm Warm-Wall Planetary Vapor-Phase Epitaxial (VPE) Reactor. The increased areal throughput offered by this reactor and 150-mm diameter wafers, is intended to reduce the cost per unit area for SiC epitaxial layers, increasing the market penetration of already successful commercial SiC Schottky and MOSFET devices [1]. Growth rates of 20 micron/hr and short <2 hr fixed-cycle times (including rapid heat-up and cool-down ramps), while maintaining desirable epitaxial layer quality were achieved. No significant change in 150 mm diameter wafer shape is observed upon epitaxial growth consistent with good-quality, low-stress substrates and low (<5°C) cross-wafer epitaxial reactor temperature variation. Specular epitaxial layer morphology was obtained, with morphological defect densities consistent with projected 5x5 mm die yields as high as 80% and surface roughness, Ra, of 0.3 nm. Intrawafer thickness uniformity is good, averaging only 1.6% and within a run wafer-to-wafer thickness variation is 2.7%. N-type background doping densities less that 1E14 cm-3 have been measured by CV. Doping uniformity and wafer-to-wafer variation currently average ~12% requiring further improvement. The first 100 m thick 150-mm diameter epitaxial growths are reported.

Abstract: Epitaxial growth of SiC films was performed on 4H SiC n+ substrates utilizing a chlorosilane/propane chemistry in both single wafer and batch CVD systems. Variations of the chlorosilane flow under fixed conditions of gas composition, temperature and pressure resulted in growth rates between 4 to 20 μm/hr. Fixing the chlorosilane flow rate to achieve a growth rate of approximately 4 μm/hr, the effects of temperature, pressure and gas composition on background dopant incorporation, epitaxial layer uniformity and epitaxial defect generation were investigated. Intentional n and p-type doping has been demonstrated over the carrier range 1×1018-1×1020/cm3. This paper presents the first reported of use of chlorosilane precursors to grow high quality undoped, n and p doped SiC epilayers.

Abstract: We present a survey of the most important factors relating to an epitaxial SiC growth process that is suitable for bipolar power devices. During the last several years, we have advanced our hot-wall SiC epitaxial growth technology to the point that we can support the transition of bipolar power devices from demonstrations to applications. Two major concerns in developing a suitable epitaxial technology are epilayer uniformity and extended defect density. Our state-of-theart capability permits the realization of 1-cm2 area devices with exceptional yields. Another major concern is the stability of bipolar devices during forward conduction. We have developed proprietary substrate and epilayer preparation technologies that have essentially eliminated Vf drift as a significant barrier to the exploitation of SiC based bipolar devices.

Abstract: Experimental results are presented for SiC epitaxial layer growths employing a largearea, 7x3-inch, warm-wall planetary SiC-VPE reactor. This high-throughput reactor has been optimized for the growth of uniform 0.01 to 30-micron thick, specular, device-quality SiC epitaxial layers with background doping concentrations of <1x1014 cm-3. Multi-layer device profiles such as Schottky, MESFETs, SITs, and BJTs with n-type doping from ~1x1015 cm-3 to >1x1019 cm-3, p-type doping from ~3x1015 cm-3 to >1x1020 cm-3, and abrupt doping transitions (~1 decade/nm) are regularly grown in continuous growth runs. Intrawafer layer thickness and n-type doping uniformities of <1% and <5% s/mean have been achieved. Within a run, wafer-to-wafer thickness and doping variation are ~±1% and ~±5% respectively. Long term run-to-run variations while under process control are approximately ~3% s/mean for thickness and ~5% s/mean for doping. Latest results from an even larger 6x4-inch (100-mm) reactor are also presented.