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Experimental Investigations of Silicon Wafer Grinding
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Experimental Investigations of Silicon Wafer Grinding

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Abstract:

The majority of integrated circuits are built on silicon wafers. To manufacture high-quality silicon wafers, a series of processes are needed. After a wire sawing process slices silicon ingots into wafers, grinding processes can be used to flatten the sliced wafers. This paper reports three experimental investigations on wafer grinding. The first investigation was to study the effectiveness of soft-pad grinding in removing the wire-sawing induced waviness. The second was to explore the capability of grinding in achieving super flatness. The third was to study the effects of grinding parameters on wafer flatness.

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Periodical:

Key Engineering Materials (Volume 329)

Pages:

361-366

DOI:

https://doi.org/10.4028/www.scientific.net/KEM.329.361

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Online since:

January 2007

Authors:

J.H. Liu, Zhi Jian Pei, Graham R. Fisher

Keywords:

Flatness, Grinding, Machining, Manufacturing, Polishing, Semiconductor Materials, Silicon Wafer, Waviness

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© 2007 Trans Tech Publications Ltd. All Rights Reserved

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References

[1] G.S. May and S.M. Sze: Fundamentals of Semiconductor Fabrication (Wiley Publications, New York 2004).

Google Scholar

[2] P. Van Zant: Microchip Fabrication (McGraw-Hill Publications, New York 2000).

Google Scholar

[3] K.V. Ravi: Solid State Phenomena, Vol. 69-70 (1999), pp.103-111.

Google Scholar

[4] R. Vandamme, Y. Xin and Z.J. Pei: Method of processing semiconductor wafers, US Patent 6, 114, 245, (2000).

Google Scholar

[5] W.J. Liu, Z.J. Pei and X.J. Xin: Journal of Materials Processing Technology, Vol. 129 (2002), pp.2-9.

Google Scholar

[6] Z.J. Pei, Graham R. Fisher, Milind Bhagavat and S. Kassir: International Journal of Machine Tools & Manufacture, Vol. 45 (2005), pp.1140-1151.

DOI: 10.1016/j.ijmachtools.2004.12.006

Google Scholar

[7] Z.J. Pei, S. Kassir, Milind Bhagavat and Graham R. Fisher: International Journal of Machine Tools & Manufacture, Vol. 44 (2004), pp.297-304.

Google Scholar

[8] S. M. Kassir and T.A. Walsh: Grinding process and apparatus for planarizing sawed wafers, US Patent 5, 964, 646, (1999).

Google Scholar

[9] M. Kulkarni and A. Desai: Silicon wafering process flow, US Patent 6, 294, 469, (2001).

Google Scholar

[10] H.S. Oh and H.L. Lee: Japanese Journal of Applied Physics, Vol. 40 (2001), pp.5300-5301.

Google Scholar

[11] SEMI, Specifications for Polished Mono-crystalline Silicon Wafers, SEMI M1-0600, Semiconductor Equipment and Materials International, San Jose, CA, (2000).

Google Scholar