Papers by Author: Eugene A. Imhoff

Abstract: Graphene, a 2D material, has motivated significant research in the study of its in-plane charge carrier transport in order to understand and exploit its unique physical and electrical properties. The vertical graphene-semiconductor system, however, also presents opportunities for unique devices, yet there have been few attempts to understand the properties of carrier transport through the graphene sheet into an underlying substrate. In this work, we investigate the epitaxial graphene/4H-SiC system, studying both p and n-type SiC substrates with varying doping levels in order to better understand this vertical heterojunction.

Abstract: Integration of patterned ballast resistance into the anode of SiC PiNs is a solution to the dilemma of negative dV_f /dT for such diodes. In fabricated 4H-SiC PiN diodes, we demonstrate a cross-over from negative to positive temperature coefficient for current densities as low as 80 A/cm². Adjusting the percentage of the patterned anode area, the positive or neutral dV_f /dT can be achieved over a wide current-density range without substantial penalty in the forward voltage drop. This characteristic is crucial for high-power SiC packages with ganged-parallel rectifier arrays.

Abstract: The performance of Junction Barrier Schottky (JBS) diodes developed for medium voltage hard-switched Naval power conversion is reported. Nominally 60 A, 4.5kV rated JBS freewheeling diodes were paired with similarly rated Si IGBTs and evaluated for temperature dependent static and dynamic characteristics as well as HTRB and surge capability. The SiC JBS/Si IGBT pair was also directly compared to Si PiN diode/Si IGBT with similar ratings. Compared to Si, the SiC freewheeling diode produced over twenty times lower reverse recovery charge leading to approximately a factor-of-four-reduction in turn-on loss. Alternatively, for equivalent total switching loss, the SiC JBS/Si IGBT hybrid configuration allows for at least a 50% increase in specific switched power density. Reliability testing showed the devices to be robust with zero failures.

Abstract: Homo- and heteroepitaxial 3C-SiC layers were grown on 4H-SiC step-free mesas. The yields of smooth, defect-free mesas were ~ 17% for both intentionally and unintentionally doped films, while those with screw dislocations and multiple stepped surfaces were ~ 22%. The electronic and structural properties of the mesas were found on a micrometer-sized length scale using µ-PL and µ-Raman, respectively. 3C-SiC mesas were found to have complete 3C-SiC coverage with some of the mesas having electronic defects, while other mesas were found to be defect-free.

Abstract: Field-effect transistors were fabricated on GaN and Al0.2Ga0.8N epitaxial layers grown by metal organic chemical vapor deposition (MOCVD) on sapphire substrates. The threshold voltage VTH was higher when AlGaN was used as an active layer. VTH also increased with temperature due to the increased positive polarization charge at the GaN/AlN buffer/sapphire interfaces. Drain current increased at high temperatures even with more positive threshold voltage, which makes GaN-based FET devices attractive for high temperature operation.

Abstract: In silicon carbide devices used above around 2.4 kV, effective anode edge termination usually requires a high-resolution floating guard ring implant or multiple lithography/implant cycles to effect a multi-zone junction termination extension. In general the goal is to produce a smoothly tapered field profile to prevent high-voltage field-crowding that causes premature breakdown at the edge of the high voltage electrode. Using a much simpler grayscale photolithographic technique and a single termination implant, we directly produce the desired tapered doping profile. The effectiveness of this termination is shown by the near-ideal (6.1 kV) breakdown measured in PiN diodes made with a 38 µm intrinsic layer. The simple method is applicable to the fabrication of many high-voltage devices.

Abstract: Threshold voltage (Vth) was measured on 4H-SiC power DMOSFET devices as a function of temperature, gate stress, and gate stress time. Vth varied linearly with gate stress and gate stress time and inversely with temperature. This instability is explained with the trapping rate of channel electrons at or near the SiO2-SiC interface. Since the measurement scale of Vth is large in this case (it takes approx. 20 s to measure Vth), it is assumed that fast interface traps, i.e., ones closer to the interface, are already filled and do not contribute to the shift in Vth. Comparison with theoretical calculations shows the rate of carrier detrapping becomes higher with temperature and as a result the measured value of Vth approaches the theoretical value.

Abstract: Forward and reverse bias performance of 10kV, 10A and 20A junction barrier-controlled Schottky 4H silicon carbide rectifiers are presented. Over a temperature range of 30 to 200°C, the forward current-voltage curves show a normal Schottky rectifier relationship and the reverse current-voltage curves show typical PiN blocking. When operated in reverse-blocking at 125°C and 8kV, the 10A JBS rectifiers are notably stable at less than 5μA of leakage current, despite the large active area of the devices.