Papers by Author: Gi Sub Lee

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Abstract: The effect of slurry composition and wafer flatness on a material removal rate (MRR) and resulting surface roughness which are evaluation parameters to determine the CMP characteristics of the on-axis 6H-SiC substrate were systematically investigated. 10 x 10 mm2 6H-SiC substrates and 2-inch SiC wafers fabricated from the ingot grown by a conventional physical vapor transport (PVT) method are used for this study. The SiC substrate after the CMP process using slurry added oxidizers into slurry consisted of KOH-based colloidal silica and nano-size diamond particle exhibited the significant MRR value and a fine surface without any surface damages. SiC wafers having high bow value after the CMP process exhibited large variation in surface roughness value compared to wafer with low bow value. The CMP-processed SiC wafer having a low bow value of 10m was observed to result in the MRR value of 0.15 m/h and the mean height (Ra) value of 0.772Ǻ.
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Abstract: Two SiC single crystal ingots were prepared using sublimation PVT techniques through the different process procedure and then their crystal quality was systematically compared, because the present research was focused to improve the quality of SiC crystal by modifying the initial stage of the PVT growth. Before the main growth step for growing SiC bulk crystal, initial stage period where growth rate was kept to relatively low rate of <10μm/h was introduced to conventional process procedure. N-type 2”-SiC single crystals exhibiting the polytype of 6H-SiC was successfully fabricated. As compared to the characteristics of SiC crystal grown using the conventional schedule, the quality of SiC crystal grown with modifying the initial stage was significantly improved, exhibiting decrease of defect formation such as micropipe and polytype formation.
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Abstract: A sublimation epitaxial method, referred to as the Closed Space Technique (CST) was adopted to produce AlN epitaxial layers. In this study, we report the surface morphology of AlN epitaxial layer grown on various substrates such as 3C-SiC (100), 4H-SiC (0001) with 8o off-axis (0001) plane tilted toward the <11 2 0> direction and on-axis 4H-SiC (0001). An average growth rate of AlN layer at 2350oC in 500 Torr of N2 was measured to be about 6μm/hr. While AlN layer grown on the 3C-SiC (100) substrate at 2350oC exhibited polycrystalline structure, AlN epitaxial layer grown on on-axis and off-axis 4H-SiC (0001) substrates had highly c-axis oriented epitaxial structure. In particular, the stacked structure of hexagonal plates was observed on off-axis substrate and the size of the hexagonal plates increased with growth time. Hexagonal plates were observed to be coalesced and the step-bunching was finally disappeared.
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Abstract: 2inch 6H-SiC (0001) wafers were sliced from the ingot grown by a conventional physical vapor transport (PVT) method using an abrasive multi-wire saw. While sliced SiC wafers lapped by a slurry with 1~9㎛ diamond particles had a mean height (Ra) value of 40nm, wafers after the final mechanical polishing using the slurry of 0.1㎛ diamond particles exhibited Ra of 4Å. In this study, we focused on investigation into the effect of the slurry type of chemical mechanical polishing (CMP) on the material removal rate of SiC materials and the change in surface roughness by adding abrasives and oxidizer to conventional KOH-based colloidal silica slurry. The nano-sized diamond slurry (average grain size of 25nm) added in KOH-based colloidal silica slurry resulted in a material removal rate (MRR) of 0.07mg/hr and the Ra of 1.811Å. The addition of oxidizer (NaOCl) in the nano-size diamond and KOH based colloidal silica slurry was proven to improve the CMP characteristics for SiC wafer, having a MRR of 0.3mg/hr and Ra of 1.087Å.
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Abstract: A sublimation epitaxial method, referred to as the Closed Space Technique (CST) was adopted to produce thick SiC epitaxial layers for power device applications. In this study, we aimed to systematically investigate surface morphologies and electrical properties of SiC epitaxial layers grown with varying a SiC/Al ratio in a SiC source powder during the sublimation growth using the CST method. It was confirmed that the acceptor concentration of epitaxial layer was continuously decreased with increasing the SiC/Al ratio. The blue light emission was successfully observed on a PN diode structure fabricated with the p-type SiC epitaxial layer. Furthermore, 4H-SiC MESFETs having a micron-gate length were fabricated using a lithography process and their current-voltage performances were characterized.
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