Papers by Author: Hae Do Jeong

Abstract: The effect of slurry composition and wafer flatness on a material removal rate (MRR) and resulting surface roughness which are evaluation parameters to determine the CMP characteristics of the on-axis 6H-SiC substrate were systematically investigated. 10 x 10 mm2 6H-SiC substrates and 2-inch SiC wafers fabricated from the ingot grown by a conventional physical vapor transport (PVT) method are used for this study. The SiC substrate after the CMP process using slurry added oxidizers into slurry consisted of KOH-based colloidal silica and nano-size diamond particle exhibited the significant MRR value and a fine surface without any surface damages. SiC wafers having high bow value after the CMP process exhibited large variation in surface roughness value compared to wafer with low bow value. The CMP-processed SiC wafer having a low bow value of 10m was observed to result in the MRR value of 0.15 m/h and the mean height (Ra) value of 0.772Ǻ.

Abstract: Cu (copper) has been widely used for interconnection structure in integrated circuits because of its properties such as a low resistivity and high resistance to electromigration when compared with aluminum [1, 2]. Damascene process for the interconnection structure utilizes 2-steps CMP (chemical mechanical polishing). After 2-steps CMP process, many abrasive particles leave on the wafer surface, which should be removed in post-Cu CMP cleaning process. Cleaning efficiency affects directly on the subsequent process and device yield [3]. Therefore, cleaning of abrasive particles is the critical issue in semiconductor manufacturing.

Abstract: 2inch 6H-SiC (0001) wafers were sliced from the ingot grown by a conventional physical vapor transport (PVT) method using an abrasive multi-wire saw. While sliced SiC wafers lapped by a slurry with 1~9㎛ diamond particles had a mean height (Ra) value of 40nm, wafers after the final mechanical polishing using the slurry of 0.1㎛ diamond particles exhibited Ra of 4Å. In this study, we focused on investigation into the effect of the slurry type of chemical mechanical polishing (CMP) on the material removal rate of SiC materials and the change in surface roughness by adding abrasives and oxidizer to conventional KOH-based colloidal silica slurry. The nano-sized diamond slurry (average grain size of 25nm) added in KOH-based colloidal silica slurry resulted in a material removal rate (MRR) of 0.07mg/hr and the Ra of 1.811Å. The addition of oxidizer (NaOCl) in the nano-size diamond and KOH based colloidal silica slurry was proven to improve the CMP characteristics for SiC wafer, having a MRR of 0.3mg/hr and Ra of 1.087Å.

Abstract: Silicon carbide (SiC) is a wide band gap semiconductor being developed for high temperature, high power, and high frequency device applications. For the manufacturing of SiC to semiconductor substrate, many researchers have studied on the subject of SiC polishing. However, SiC faces many challenges for wafer preparation prior to epitaxial growth due to its high hardness and remarkable chemical inertness. A smooth and defect free substrate surface is important for obtaining good epitaxial layers. Therefore, hybrid process, chemical mechanical polishing (CMP) has been proposed to achieve epi-ready surface. In this paper, the material removal rate (MRR) is investigated to recognize how long the CMP process continues to remove a damaged layer by mechanical polishing using 100 nm sized diamond, and the authors tried to find the dependency of mechanical factors such as pressure, velocity and abrasive concentration using single abrasive slurry (SAS). Especially, the authors tried to get an epi-ready surface with mixed abrasive slurry (MAS). The addition of the 25nm sized diamond in MAS provided strong synergy between mechanical and chemical effects resulting in low subsurface damage. Through experiments with SAS and MAS, it was found that chemical effect (KOH based) was essential and atomic-bit mechanical removal was efficient to remove residual scratches in MAS. This paper concluded that SiC CMP mechanism was quite different from that of relatively soft material to achieve both of high quality surface and MRR.

Abstract: Lithium niobate (LN, LiNbO3) is a kind of artificial crystal with piezoelectricity, pyroelectricity and ferroelectricity, which has been widely used in electron components. The large difference in thermal expansion coefficients between Si and LN causes a serious thermal stress during the thermal-pressure bonding process. Therefore room temperature bonding would be the best candidate to make strong and stress-free interface between Si and LN. However, room temperature bonding requires lower surface roughness (Ra<2nm) and lower defects on the LN wafer surface than those of thermal bonding. Chemical mechanical polishing (CMP) process helps LN to obtain the high quality surface and thin wafer suited in room temperature bonding. The LN wafer was polished using colloidal silica slurry, resulting in high material removal rate (MRR) and fine surface quality under the condition of low pH, high abrasive concentration and low flow rate. The polishing mechanism of LN was discussed by mechanical, chemical and thermal analysis.

Abstract: Chemical mechanical polishing (CMP) has been used as planarization process in the fabrication of semiconductor devices. The CMP process is required to planarize the overburden film in an interconnect process by high relative velocity between head and platen, high pressure of head and chemical effects of an aqueous slurry. But, a variety of defects such as dishing, delamination and metal layer peering are caused by CMP factors such as high pressure, pad bending and strong chemical effect. The electrical energy of the electro-chemical mechanical planarization (ECMP) dissolves copper (Cu) solid into copper ions electrochemically in an aqueous electrolyte. The dissolved copper complex layer or passivation layer is removed by the mechanical abrasions of polishing pad and abrasive. Therefore the ECMP process realizes low pressure processing of soft metals to reduce defects comparing to traditional CMP process. But, if projected metal patterns were removed and not remained on whole wafer surface in final processing stage, Cu layer could not be removed by ECMP process. The two-step process consists of the ECMP and the conventional CMP used in micro patterned Cu wafers. First, the ECMP process removed several tens 'm of bulk copper on Cu patterned wafer within shorter process time than the Cu CMP. Next, residual Cu layer was completely removed by the Cu CMP under low pressure. Total time and process defects are extremely reduced by the two-step process.

Abstract: In this paper, a new replication technique for 1D, 2D, and 3D microstructure was introduced, in which a master pattern was made of photo-curable epoxy using microstereolithography technology, an etching process, and a dicing process. Next, it was transferred onto an epoxy. Barrier ribs were selected as the 1D microstructure, and a rectangular pattern was selected as the 2D microstructure. A helical gear was selected as one of the real 3D microstructures for this study, and these were replicated from pure epoxy. In addition, the life span of the soft mold for using the micro replication process was evaluated.

Abstract: Chemical mechanical polishing (CMP) has become the preferred technology to achieve global planarization of wafer surfaces. Especially in oxide CMP, mechanical factors have a greater effect on the removal rate than chemical factors. So, the effects of mechanical parameters in CMP can be expressed as friction force and heat caused by friction. The friction force can be evaluated by a CMP friction force monitoring system and process temperature can be obtained by an infrared rays (IR) sensor. Furthermore, friction energy can be calculated from the friction force monitoring system. In this paper, research on the correlation between frictional and thermal characteristics of SiO2 slurry and CMP results was conducted. This data, which was obtained by using integrated monitoring system for CMP, will lead to the efficient prediction of CMP results.

Abstract: As copper technology moves from pilot to volume manufacturing, semiconductor fabrication is focused on methods to improve device yield. In especially semiconductor manufacturing, electrochemically deposited copper is the material of choice for advanced interconnect applications. Electrochemical deposition (ECD) employs copper plating electrolytes with organic additives to achieve bottom-up filling of small vias and trench with high aspect-ratios. However, for features with small aspect-ratios, the ECD process yields conformal layers because the additives and the bottom-up fill mechanism are not operative in such large features. So, ECD process does not achieve within-die and within-wafer planarity of the deposited copper layer. For planarization of large features and obtaining globally and locally flat films, an electro-chemical mechanical deposition (ECMD) method has been employed. ECMD process is a novel technique that has ability to deposit planar conductive films on non-planar substrate surfaces. Technique involves simultaneous ECD roles and mechanical sweeping of the substrate surface. Copper layer deposited by the ECMD process grows preferentially in cavities on the wafer surface yielding flat profiles and much reduced overburden thickness. Preferential deposition into the cavities on the substrates surface may be achieved through two different mechanisms. The first mechanism is more mechanical in nature and it involves material removal from the top surface. The second mechanism is more chemical in nature and it involves enhancing deposition into the cavities where mechanical sweeping does not reach, and reducing deposition onto surfaces that are swept. Planar layers obtained by the ECMD technique are suitable for low stress material removal processes. Planar layers also yield improved parametric results in device structures after the material removal step. In this study, we demonstrate mechanical role of pad gives effects in ECMD process. So we evaluate gap-filling and planarization between ECMD and ECD.