Papers by Author: Hrishikesh Das

Abstract: 4H Silicon Carbide (4H-SiC) has a great potential for low-loss power devices due to its superior electrical properties. However, the increase in demand for the power devices requires high quality SiC substrates and epitaxial layers. Mercury probe Capacitance Voltage (Hg CV) measurement is a well known procedure to characterize epi layers grown on SiC substrates, due to its non-destructive technique. However, careful calibration of the tool is very important for repeatable and accurate measurements. Here we present very close repeatability of Hg CV within 2.4% (standard deviation 0.7%), between different Solid State Measurements (SSM) setups compared with Ni Schottky (NiS) CV. In addition to growing uniformly doped epi layers, high surface quality of the epi layer is also needed for improved device performance. Improved process conditions resulted in a smooth epi with a surface roughness Ra 1.2 nm for a 6 µm thick epi layer. Molten Potassium Hydroxide (KOH) etching analysis also revealed a significant correlation between the surface roughness and epi defects.

Abstract: Dislocations were investigated in the halo-carbon low-temperature epitaxial growth and low-temperature selective epitaxial growth (LTSEG) conducted at 13000C. The origin of triangular defects was investigated in low-temperature epilayers grown at higher growth rates with HCl addition. Due to the conversion of substrates’ basal plane dislocations (BPD) into threading dislocations, the concentration of BPDs was about an order of magnitude lower than the concentration of threading dislocations at moderate growth rates. An additional order of magnitude conversion of BPDs into threading dislocations was observed at higher grow rates achieved with HCl addition. In LTSEG epilayers, dislocation concentration away from the mesa walls was comparable to the blanket (i.e., regular non-selective) growth. High concentrations of BPDs were found only at mesa edges located on the “upstream” side with respect to the step-flow direction. No substrate defects could be traced to the triangular defects. Instead, the disturbances causing the triangular defect generation are introduced during the epitaxial process.

Abstract: In this work, the local-loading effect and its influence on the growth rate enhancement and the growth rate non-homogeneity is investigated during the halo-carbon low-temperature selective epitaxial growth (LTSEG) using an SiO2 mask. The average growth rate during the LTSEG can be more than three-times higher than in blanket epitaxy at the same growth conditions. Both the size of the LTSEG seed windows and the surrounding area covered with the mask determine the growth rate non-homogeneity. A model for predicting the growth rate distribution is suggested.

Abstract: Previously reported CVD epitaxial growth of 4H-SiC at temperatures down to and below 13000C using CH3Cl precursor offered a promise of new device applications that could benefit from lower-temperature growth process. In this work, selective epitaxial growth (SEG) of 4H-SiC mesas using conventional SiO2 low temperature mask is reported. Virtually no nucleation on the mask could be observed after SEG at 13000C. The mask could be easily removed after the growth, with no degradation of the surface of SiC substrate under the mask. For the growth conditions that normally resulted in growth rate of 2 /m/hr and defect-free epilayer morphology during regular full-wafer (non-SEG) epitaxy, the epilayer morphology during SEG was significantly degraded by the appearance of oriented triangular defects, while the growth rate increased more than three times in comparison to the blanket epitaxial growth due to the loading effect. The growth at optimized growth conditions and lower growth rate resulted in significant reduction of the surface defects, making this approach promising for obtaining device-quality mesas. The crystal quality of the mesas, defects at the mesa walls, formation of facets during SEG, and other effects are reported.

Abstract: Dielectric charges and charge stability were compared in different dielectrics formed on SiC by different processing techniques. The concentration and transient behavior of the interface and trapped charges were investigated. Strong hysteresis and flat-band voltage drift under applied bias were observed in some of the samples. They are attributed to the trapping of the charge injected in the dielectrics. Differences in charge injection, charge trapping, and capture/emission of carriers by interface traps were pronounced for the investigated SiO2 and Si3N4 dielectrics.

Abstract: Room temperature Fourier Transform Infrared Reflection Spectroscopy (FTIR) was used to investigate the thickness and Free Carrier Concentration (FCC) of heavily and lightly doped 4H and 6H-SiC epitaxial films. Multiple epitaxial layer stacks typical of lateral devices such as the MESFET were grown on 6H-SiC semi-insulating substrates. The estimation of thickness and FCC of the n-channel epi layer is improved by studying the Longitudinal Optical Phonon Plasmon Coupled Modes (LPP). A modelbased analysis of the experimental reflectance spectra from these samples is performed using a dielectric function that accounts for the phonon-photon coupling and plasmonphoton coupling. The value of the LPP+ mode frequency estimated from the reflectance spectrum in the range 600-1200 cm-1 is observed to increase in direct correlation with the electron free-carrier concentration.