Papers by Author: Naoki Hatta

Abstract: A reliable method for reducing the stacking faults (SFs) is demonstrated on the 3C-SiC (001) surface. It is a practical method based on Monte Carlo (MC) simulations of SF propagation during 3C-SiC epitaxial growth, which showed that introducing some discontinuity on the (001) surface enhanced SF reduction. The method is implemented by patterning on the 3C-SiC (001) surface and subsequent homo-epitaxial growth, and this sufficiently reduced the SF density to less than 400 cm^-1. A yield of 97.4 % was estimated for a device-ready area of 10 mm² by statistical measurements of SF density on the entire epitaxial layer surface.

Abstract: The dependence of the reverse current of 3C-SiC p+-n diodes on the temperature and on the reverse bias is measured and a model based on thermally-assisted tunneling is proposed to explain the dominating mechanism responsible for the leakage current. Taking into account an additional ohmic shunt resistance, the experimental reverse characteristics and thermal barrier heights B can sufficiently be reproduced.

Abstract: To quantitatively evaluate the efficacy of stacking fault (SF) reduction methods, Monte Carlo simulations are carried out to reveal the SF distribution on a 3C–SiC (001) surface. SF density decreases with increasing epitaxial layer thickness and reducing size of the substrates. Additionally, SF density depends on interactions between adjoining SFs: annihilation of counter SF-pairs or termination of orthogonal SF-pairs. However, the SF is not entirely eliminated when growth occurs on undulant-Si or switchback epitaxy due to “spontaneous SF collimation”. The simulation shows that effective SF reduction methods, those that enhance the SF termination or annihilation, can theoretically attain the SF density on 3C–SiC (001) below 100 cm-1.

Abstract: p-type 3C-SiC samples were implanted by iron (Fe) and investigated by means of deep level transient spectroscopy (DLTS). Corresponding argon (Ar) profiles with similar implantation damage were implanted in order to distinguish between iron-related defects and defects caused by implantation damage. Two donor-like iron-related centers were identified in p-type 3C-SiC.

Abstract: A large leakage current (IR) is observed at reverse bias (VR) in 3C-SiC p+-n diodes. This leakage current is caused by a high density of stacking faults (SFs). The temperature dependence of IR is studied in the temperature range from 100 K to 295 K. It turns out that IR is thermally activated for reverse voltages VR  |170| V. We propose that within this voltage range IR originates from thermally assisted tunneling of electrons and holes from band-like states of the SFs into the conduction and valence band. For VR > |170| V, the thermal barrier is strongly reduced and direct tunneling dominates. These dependences are simulated in the framework of a simplified model.

Abstract: The correlation between leakage current and stacking fault (SF) density in p-n diodes fabricated on 3C-SiC homo-epitaxial layer is investigated. The leakage current density at reverse bias strongly depends on the SF density; an increase of one order of magnitude in the SF density enhances the leakage current by five orders of magnitude at a reverse bias of 400 V. In order to obtain commercially suitable MOSFETs with 10-4Acm-2 at 600V, the SF density has to be reduced below 6×104 cm-2. Photoemission caused by hot electrons, which travel along a leakage path, can be observed at the crossing between a SF and the edge of p-well region; where the maximum electric field is induced. The mechanism of the leakage current is discussed in detail in a separate paper.

Abstract: 3C-SiC/SiO2-capacitors are fabricated by over-oxidation of an implanted Gaussian nitrogen (N) profile and investigated by conductance spectroscopy. A double peak structure is observed in the conductance spectra indicating two types of traps, which change their charge state at identical time constant, however, which are located at different energy positions in the bandgap of 3C-SiC. The experimental G/w-V and C-V characteristics are simulated and the existence of two types of traps is verified in the framework of a theoretical model.

Abstract: In 3C-SiC MOSFETs, planar defects like anti-phase boundaries (APBs) and stacking-faults (SFs) reduce the breakdown voltage and induce leakage current. Although the planar defect density can be reduced by growing 3C-SiC on undulant-Si substrate, specific type of SFs, which expose the Si-face, remains on the (001) surface. Those SFs increase the leakage current in devices made with 3C-SiC. In order to eliminate the residual SFs, an advanced SF reduction method involving polarity conversion and homo-epitaxial growth was developed. This method is called switch-back epitaxy (SBE) and consists of the conversion of the SF surface polarity from Si-face to C-face and following homo-epitaxial growth. The reduction of the SF density in SBE 3C-SiC results in a tremendous improvement of the device performance. The combination of the achieved blocking voltage with the demonstrated high current capability indicates the potential of 3C-SiC vertical MOSFETs for high and medium power electronic applications such as electric and hybrid electric vehicle (EV/HEV) motor drives.

Abstract: A new technique that reduces stacking fault (SF) density in 3C-SiC, termed switch-back epitaxy (SBE), is demonstrated regarding its effects on morphological and electrical properties. SBE is a homoepitaxial growth process on backside of 3C-SiC grown on undulant-Si. The key feature of SBE, the surface polarity of residual SFs in 3C-SiC, which cannot be erased by heteroepitaxial growth on undulant-Si, is converted from the Si-face to the C-face. The SF density on the surface of 3C-SiC grown by SBE shows a remarkable decrease to one-seventh lower than that on undulant- Si. The leakage current of pn-diode epitaxially fabricated on the 3C-SiC substrate grown by SBE decreases to as low as one-thirtieth that on 3C-SiC substrate grown without SBE. These results suggest that SBE eliminates the SFs on the surface of 3C-SiC and subsequently reduces the leakage current at pn-junction thus fabricated.