Papers by Keyword: Near-interface Traps

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Abstract: This paper presents a comparison of the density of performance-degrading near-interface traps (NITs) in the most commonly available 1200 V commercial N-channel SiC power metal–oxide–semiconductor field-effect transistors (MOSFETs). A recently developed integrated-charge technique was used to measure the density of NITs with energy levels aligned to the conduction band, which degrade MOSFET’s performance by capturing and releasing electrons from the channel biased in the strong-inversion condition. Trench MOSFETs of one manufacturer have lower densities of these NITs in comparison to MOSFETs with the planar gate structure, corresponding to observed higher channel-carrier mobility in trench MOSFETs. Different response-time distributions were also observed, corresponding to different spatial location of the measured NITs.
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Abstract: The inversion channel electron mobility in 4H-SiC MOSFETs with NO annealed gate oxides is still well below its theoretical limit. The physical reason behind the reduced mobility is not yet fully established but has for example been attributed to a high density of very fast interface traps close to the conduction band edge. These traps are not detected by high-low CV analysis at room temperature but are observed by conductance spectroscopy at low temperatures. In this study we demonstrate how conventional high-low CV analysis of MOS capacitors at cryogenic temperatures can be applied to detect and quantify these very fast traps.
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Abstract: This paper presents a comparative analysis of the electrically active near-interface traps, energetically located above the bottom of conduction band. Two different samples of N-type SiC MOS capacitors were fabricated with gate oxides grown in (1) dry O2 (as-grown) and (2) dry O2 annealed in nitric oxide (nitride). Measurements performed by the direct measurement method revealed that the traps located further away from the SiO2/SiC interface are removed by nitridation. A spatially localized behaviour of NITs is observed only in the nitrided gate oxide but not in the as-grown gate oxide.
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Abstract: We demonstrate how sodium enhanced oxidation of Si face 4H-SiC results in removal of near-interface traps at the SiO2/4H-SiC interface. These detrimental traps have energy levels close to the SiC conduction band edge and are responsible for low electron inversion channel mobilities (1-10 cm2/Vs) in Si face 4H-SiC metal-oxide-semiconductor field effect transistors. The presence of sodium during oxidation increases the oxidation rate and suppresses formation of these nearinterface traps resulting in high inversion channel mobility of 150 cm2/Vs in such transistors. Sodium can be incorporated by using carrier boats made of sintered alumina during oxidation or by deliberate sodium contamination of the oxide during formation of the SiC/SiO2 interface.
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