Papers by Keyword: Porous Low-k

Abstract: Porous low-k materials used as insulator for interconnection levels in CMOS devices, are easily damaged during the patterning processes. Pore size characterization after material damage is challenging due to the chemical modification induced by the applied process. Numerical simulation of solvent adsorption on silica and functionalized silica surfaces was used to improve material pore size determination by ellipso-porosimetry, taking into account the modifications of surface/solvent interactions.

Abstract: For the 32nm logic technology and beyond, more stringent specifications in terms of dimensions and materials integrity continue to drive the cleaning process improvements. In this paper, post-etch wet cleaning was optimized in order to address CD loss issues and metal hard mask cleaning improvement in a Trench First Hard Mask (TFHM) backend architecture. Based on materials compatibility tests and electrical results, this wet clean process should also be fully compatible with a Via First Trench Last (VFTL) architecture.

Abstract: Wet chemical plasma etch residue removal is a promising alternative to low-k dielectric degrading plasma cleaning processes. With decreasing feature dimensions the wetting behavior of the liquid on low energetic surfaces present after dielectric patterning will be an important issue in developing wet cleaning solutions. High surface energy liquids may not only be unable to wet low energetic surfaces, but can also cause nonwetting of small structures or pattern collapse. The improvement of the wetting behavior of a cleaning liquid by lowering its surface energy by the addition of surfactants is the strategy followed in this study. We show that with choosing the appropriate rinsing solution a wet chemical process using surfactant aided cleaning solutions compatible to the materials used in BEOL (porous low-k, copper, barriers) can be found. The results show a distinct improvement of the wetting behavior of the modified solutions on several low energetic solid surfaces like copper or polymers deposited during dry etching.

Abstract: The removal of plasma etch residues by wet cleaning is an alternative or additional process to plasma processes, which are known to degrade low-k and ultralow-k dielectric materials. Besides Cu/low-k compatibility wetting is an important issue for wet cleaning. Surface energy of solid and liquid is the key to understand the wetting behaviour. In this study we examined the energetic character of plasma etched/stripped solid surfaces, etch polymers and several cleaning solutions by contact angle measurements. The results show, that variations of the etching process can heavily change the energetic character of the solid. Calculating the surface energies of solid and liquid provides the possibility to make a prediction if a cleaning liquid will wet the surface which has to be cleaned.

Abstract: In this study, the compatibility of "HF-Based" cleaning with porous low-k integration, and “pore-sealing” approach was investigated, and specific attention was paid to ultra low-k porosity evolution. We also tried to demonstrate if "k-recovery" could be achieved by thinning the modified surface layer in the pattern trench walls (plasma damaged layer), for 65nm and 45 nm design rules.