Authors: Muthia Elma, Amalia Enggar Pratiwi, Aulia Rahma, Erdina Lulu Atika Rampun, Noni Handayani
Abstract: Recently, water scarcity is the big issues around the world. Especially in coastal area where the water distribution could not entranced and able to supply clean water for the citizen. The one and only solution is processing seawater to produce fresh and potable water. The desalination process using membrane was recommended to solve this issue. Due to that, the membrane with good structure and high hydro-stability was necessary to fabricate. The aim of this work is to investigate the performance of silica-pectin membranes for treating seawater by pervaporation employing silica based membranes. In this work, the silica-pectin membranes were successfully fabricated using Tetraethyl orthosilicate (TEOS) as silica precursor. Then, pectin from apple was also using in various concentrations (0; 0.1 to 0.5%). This organic material was implemented as a templating agent to produce in silica-pectin thin film. This thin films were dipcoated onto membranes support during membranes fabrication. These membranes were calcined in air at 300 and 400°C using rapid thermal processing (RTP) technique. All membranes were tested for water desalination via pervaporation set-up in various feed temperatures (25, 40 and 60°C). Results show that the membranes produced were crack-free and no pore dense. The FTIR-spectra and Fityk analysis refer to membrane of 2.5% at 300°C and 0.5% at 400°C are the optimum condition due to silanol and siloxane concentrations. An excellent performance was obtained at 0.5% at 400°C with water flux of 8.3 kg.m-2.h-1 and high salt rejection of 99.4% at 60 °C of feed temperature. It clearly demonstrates that the silica-pectin membrane has a robust structures due to the templating of carbon chains into silica matrices. The presence of carbon chains in silica matrices may form the smaller and robust pores as expected, that makes the excellent salt rejection in high feed temperature.
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Authors: Peng Dong, Xing Bo Liang, Da Xi Tian, Xiang Yang Ma, De Ren Yang
Abstract: We report a strategy feasible for improving the internal gettering (IG) capability of iron (Fe) for n/n+ epitaxial silicon wafers using the heavily arsenic (As)-doped Czochralski (CZ) silicon wafers as the substrates. The n/n+ epitaxial silicon wafers were subjected to the two-step anneal of 650 °C/16 h + 1000 °C/16 h following the rapid thermal processing (RTP) at 1250 °C in argon (Ar) or nitrogen (N2) atmosphere. It is found that the prior RTP in N2 atmosphere exhibits much stronger enhancement effect on oxygen precipitation (OP) in the substrates than that in Ar atmosphere, thereby leading to a better IG capability of Fe contamination on the epitaxial wafer. In comparison with the RTP in Ar atmosphere, the one in N2 atmosphere injects not only vacancies but also nitrogen atoms of high concentration into the heavily As-doped silicon substrate. The co-action of vacancy and nitrogen leads to the enhanced OP in the substrate and therefore the better IG capability for the n/n+ epitaxial silicon wafer.
218
Authors: Ling Mao Xu, Chao Gao, Xiang Yang Ma, De Ren Yang
Abstract: Effects of prior rapid thermal processing (RTP) under different atmospheres on the motion of dislocations initiated from indentations in Czochralski (CZ) silicon have been investigated. It is found that the maximum gliding distances of dislocations in the specimens with the prior RTP under nitrogen (N2) atmosphere are much smaller than those in the specimens with the prior RTP under argon (Ar) atmosphere. This is also the case when the specimens received annealing for oxygen precipitation (OP) subsequent to the RTP at 1250 °C under N2 and Ar atmospheres, respectively. It is believed that the nitrogen atoms introduced during the RTP under nitrogen atmosphere or the oxygen precipitates facilitated by the RTP-introduced nitrogen atoms can exhibit pinning effect on the dislocation motion, which increases the critical resolved shear stress for dislocation glide.
238
Authors: Christoph Merkl, Rolf Bremensdorfer
Abstract: Temperature measurement by means of a pyrometer is affected by changes in the
background illumination. Physical modeling is a very effective method to discern the origin of
radiation contributions and separate the thermal radiation emitted by the object of interest from
parasitic radiation. An observer algorithm making use of physical models was successfully applied
to infrared pyrometry for rapid thermal processing. Rapid thermal processing is characterized by fast
temperature changes in the range of several hundred degree per second. The heating source typically
emits light within a broad wavelength band ranging from visible to infrared. Especially in rapid
thermal processors that apply heat to both sides of a silicon wafer, this light is partially picked up by
the pyrometer sensor. As a consequence these types of systems require methods to handle the fast
changing radiation contribution of the heating source to the pyrometer signal.
403
Abstract: Radiant energy sources enable rapid and controllable thermal processing of wafers with
closed-loop control of wafer temperature. However the use of energy sources that are not in thermal
equilibrium with the wafers makes the heating process sensitive to the optical properties of the
wafers. In particular, patterns on wafer surfaces can cause temperature non-uniformity at length
scales where lateral thermal conduction cannot smooth out the effect. Such “pattern effects” are
even more significant for advanced processing techniques like millisecond annealing and pulsed
laser annealing, because of the extremely large heating powers employed. The issue of pattern
effects was recognized early on in the development of radiant heating technology, but has recently
become a critical issue for process control. Despite the challenges, many counter-measures can be
deployed to minimize pattern effects, including modifications to the wafer design, changes in
processing recipe and equipment configuration. Such solutions have enabled the use of radiant
heating for even the most demanding device fabrication applications.
355
Authors: Robert J. Falster, Vladimir V. Voronkov
Abstract: The use of Rapid Thermal Processing to install lattice vacancy profiles into silicon wafers
for the purpose of forming a template for the nucleation and ideal control of oxygen precipitation
has become an important materials engineering tool for the microelectronics industry. This paper
reviews the principles of the technique and the precise materials/defect engineering that it
engenders. It furthermore discusses what has been learned regarding the elusive properties of the
intrinsic point defects in silicon through studies of the distributions of vacancies created by use of
the technique. Also discussed are recent discoveries about the critical role of the other intrinsic
point defect, the self-interstitial and the development of oxygen precipitates and their distributions
post-nucleation and the critical importance of what has become to be called the “ninja
transformation” in the switching-on of gettering efficiency of oxygen precipitate systems.
45
Abstract: Rapid Thermal Processing (RTP) has been a key technology for semiconductor
manufacturing. The ability to rapidly change wafer-processing temperature in a well-controlled way
is a distinguishing characteristic of RTP. Today’s state of the art single wafer RTP equipment is
used for a wide range of thermal processes for the manufacturing of advanced semiconductor
devices. Two different designs of halogen lamp based RTP equipment dominate the applications.
The two equipment designs can be traced back to the early development of the semiconductor
industry before there was wide acceptance of RTP. Two junctures in the evolutions of these designs
resulted in the growth of RTP. The first juncture occurred when the conventional batch diffusion
furnace could not satisfy some of the thermal budget and ambient control process requirements for
semiconductor devices. A second juncture occurred with breakthrough developments in RTP
equipment that enabled better control and repeatability of the process temperature. Developments of
alternatives to tungsten halogen lamp based RTP will likely be seen in the future.
21
Authors: Ryouji Kosugi, Kenji Suzuki, Kazuto Takao, Yusuke Hayashi, Tsutomu Yatsuo, Kenji Fukuda, Hiromichi Ohashi, Kazuo Arai
Abstract: A passivation annealing in nitric oxide (NO) ambient significantly reduces the interfacial
defects of the SiO2/4H-SiC interface and improves the inversion MOS channel mobility. Effects of
the nitridation in NO ambient become more pronounced at high temperatures in general. However,
the maximum process temperature in a standard hot-wall oxidation furnace is restricted around
1200oC due to the softening point of quartz. Meanwhile, by use of a cold-wall oxidation furnace, high
temperature and short time thermal processes become possible. In this study, we have developed an
extremely high temperature (>1400oC) rapid thermal processing for the gate oxidation in the 4H-SiC
DIMOSFET fabrication process. The peak MOS channel mobility of lateral MOSFETs on the
DIMOSFET chip shows as high as 19cm2/Vs. The specific on-resistance of the device was
12.5mcm2 and the blocking voltage was 950V with gate shorted to the source.
1309
Authors: Hele Väinölä, Peng Zhang, Antti Haarahiltunen, Andrei A. Istratov, Eicke R. Weber
581
Authors: Oleg A. Agueev, Alexander M. Svetlichnyi, A.G. Klovo, A.N. Kocherov, D.A. Izotovs
107