Papers by Keyword: Selective Epitaxial Growth

Abstract: By mapping the source and HCl flow rates dependent growth rates, the evolving trend of a quasi-selective epitaxial growth (quasi-SEG) that growing very thin epilayer on mesa top and ensuring an extremely low risk of voids defect generation was firstly figured out on a 5-μm 4H-SiC trench. Then, basing on the acquired knowledge, a 25-μm 4H-SiC trench with an aspect ratio up to ~10 was completely filled in the quasi-SEG mode.

Abstract: This work reports on the improvement of ohmic contacts made on heavily p-type doped 4H-SiC epitaxial layer selectively grown by Vapor-Liquid-Solid (VLS) transport. Even before any annealing process, the contact is ohmic. This behavior can be explained by the high doping level of the VLS layer (Al concentration > 10²⁰ cm^-3) as characterized by SIMS profiling. Upon variation of annealing temperatures, a minimum value of the Specific Contact Resistance (SCR) down to 1.3x10^-6 Ω.cm² has been obtained for both 500 °C and 800 °C annealing temperature. However, a large variation of the SCR was observed for a same process condition. This variation is mainly attributed to a variation of the Schottky Barrier Height.

Abstract: This work deals with two applications of the Selective Epitaxial Growth of highly p-type doped buried 4H-SiC in Vapor-Liquid-Solid configuration (SEG-VLS). The first application is the improvement of the Specific Contact Resistance (SCR) of contacts made on such p-type material. As a result of the extremely high doping level, SCR values as low as 1.3x10^-6 Ω.cm² have been demonstrated. Additionally, the high Al concentration of the SEG-VLS 4H-SiC material induces a lowering of the Al acceptor ionization energy down to 40 meV. The second application is the fabrication of PiN diodes with SEG-VLS emitter and guard-rings peripheral protection. Influence of some process parameters and crystal orientation on the forward and reverse characteristics of the PiN diodes is discussed.

Abstract: Dislocations were investigated in the halo-carbon low-temperature epitaxial growth and low-temperature selective epitaxial growth (LTSEG) conducted at 13000C. The origin of triangular defects was investigated in low-temperature epilayers grown at higher growth rates with HCl addition. Due to the conversion of substrates’ basal plane dislocations (BPD) into threading dislocations, the concentration of BPDs was about an order of magnitude lower than the concentration of threading dislocations at moderate growth rates. An additional order of magnitude conversion of BPDs into threading dislocations was observed at higher grow rates achieved with HCl addition. In LTSEG epilayers, dislocation concentration away from the mesa walls was comparable to the blanket (i.e., regular non-selective) growth. High concentrations of BPDs were found only at mesa edges located on the “upstream” side with respect to the step-flow direction. No substrate defects could be traced to the triangular defects. Instead, the disturbances causing the triangular defect generation are introduced during the epitaxial process.

Abstract: In this work, the local-loading effect and its influence on the growth rate enhancement and the growth rate non-homogeneity is investigated during the halo-carbon low-temperature selective epitaxial growth (LTSEG) using an SiO2 mask. The average growth rate during the LTSEG can be more than three-times higher than in blanket epitaxy at the same growth conditions. Both the size of the LTSEG seed windows and the surrounding area covered with the mask determine the growth rate non-homogeneity. A model for predicting the growth rate distribution is suggested.

Abstract: Previously reported CVD epitaxial growth of 4H-SiC at temperatures down to and below 13000C using CH3Cl precursor offered a promise of new device applications that could benefit from lower-temperature growth process. In this work, selective epitaxial growth (SEG) of 4H-SiC mesas using conventional SiO2 low temperature mask is reported. Virtually no nucleation on the mask could be observed after SEG at 13000C. The mask could be easily removed after the growth, with no degradation of the surface of SiC substrate under the mask. For the growth conditions that normally resulted in growth rate of 2 /m/hr and defect-free epilayer morphology during regular full-wafer (non-SEG) epitaxy, the epilayer morphology during SEG was significantly degraded by the appearance of oriented triangular defects, while the growth rate increased more than three times in comparison to the blanket epitaxial growth due to the loading effect. The growth at optimized growth conditions and lower growth rate resulted in significant reduction of the surface defects, making this approach promising for obtaining device-quality mesas. The crystal quality of the mesas, defects at the mesa walls, formation of facets during SEG, and other effects are reported.

Abstract: Selective epitaxial growth (SEG) of cubic silicon carbide (3C-SiC) was carried out on patterned Si (100) substrates using SiO2 as a mask. The growth was performed by atmospheric pressure chemical vapour deposition in a resistance-heated furnace using hexamethyldisilane (HMDS) as the source. It was observed that voids are the major defect in the case of heteroepitaxial growth of 3C-SiC on Si. Using selective epitaxial growth, the density of voids was reduced. Lateral epitaxial overgrowth (LEO) was achieved at selected areas where windows are arrays of stripes. The effect of temperature, window shape and size, precursor concentration, etc. on the SEG of SiC has been studied. After growth, films have been characterized by Nomarski optical microscopy, SEM, Raman spectroscopy and AFM. Faceted growth was observed along (111) planes inside smaller windows. Raman spectroscopy was used to identify defects and the presence of other polytypes.

Abstract: Al-Si and Ge-Si systems were studied for selective epitaxial growth (SEG) of 4H-SiC by the Vapour-Liquid-Solid mechanism. Al-Si and Ge-Si bilayers stackings were deposited on 8° off, Si face, 4H-SiC substrates. After patterning of the layers, the samples were heated up to 1000°C and 1220°C, respectively, for Al-Si and Ge-Si stackings in order to melt the layers. Propane was introduced either during the initial heating ramp, before melting of the alloy, or after reaching the temperature plateau. It was found that introduction of propane before melting was a key parameter in order to improve the homogeneity of the deposit. In both cases, SEG of SiC was achieved. However, the best results were obtained with Ge-Si system giving smooth and uniform ∼100 nm thick epitaxial deposits on all the pattern sizes and shapes. Ge incorporation in the SiC was found to be rather limited but homogeneous in the layer.

Abstract: We have previously reported on the selective growth of 4H-SiC epitaxial layers on a 4HSiC substrates in a chemical vapor deposition (CVD) reactor using TaC mask. It was shown that pn junctions fabricated using selectively grown n-layers on trench etched p-substrates have properties similar to the mesa etched pn junction diodes, indicating good interface properties. In this paper, we present more systematic studies on the selective growth and in-situ selective etching of 4H-SiC using a TaC mask. The morphological evolution during selective epitaxy as a function of crystallographic orientation was analyzed. Anisotropy in surface morphology along <11-20> and <1-100> has been observed. Cross sectional SEM viewgraphs show lateral overgrowth on the TaC mask, and the extent of lateral overgrowth varied with the stripe orientation. It was found that the “growth window” for selective growth was a function of the surface area covered by the TaC mask as well as the window opening to mask width ratios. Experiments with various window widths to mask width ratios have been carried out to investigate the selective growth process using this mask.

Abstract: Selective nitrogen doping of 4H-SiC by epitaxial growth using TaC as the high temperature mask has been demonstrated. Nomarski optical microscope and scanning electron microscope (SEM) were used to characterize selective growth of SiC. In addition, 250µm square shaped p-n junction diodes by selective n type epitaxial growth on p type epi layer were fabricated. The refilled fingers with different width were designed to vary the periphery/area (P/A) ratio. The effects of P/A ratio on the current-voltage (J-V) characteristics have been investigated. The ideality factor extracted from J-V characteristics is ≈2 at temperature range of 25-275°C, which indicates that the Shockley-Read-Hall recombination is the dominant mechanism in the conduction region. The reverse leakage current did not show dependence on P/A ratio for trench refilled diodes. The room temperature reverse leakage current density at 100V is less than 3.5×10-7 A/cm2 for all diodes. Also, the reverse leakage current did not increase significantly with temperature up to 275°C. The breakdown voltages measured at room temperature are about 450V and 400V for diodes without and with fingers, respectively.