Paper Titles

Design and Realization of Vehicle Exhaust Gas Measurer Based on CPLD
p.1152

Design of Class D Amplifiers Using Zero Crossing Auto Gain Control
p.1157

Research on Distance Measuring System Based on Single Vision with the Aid of a Laser Pen
p.1162

Assembled Singlemode and Graded Index Fibers Simulating Collimator for All Fiber Common-Path Optical Coherence Tomography
p.1167

A Novel Charge Pumped Clock Generator for VLSI
p.1174

Design of Intelligent AC Contactor
p.1179

Application of Optoelectronic Liquid Lever Sensor in Urban Bridges Deflection Monitoring
p.1184

A Brightness and Color Correction Method of LED Display Based on CCD Camera
p.1190

Design Driving Circuit for Strain Gage Bridge
p.1196

HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 198-199A Novel Charge Pumped Clock Generator for VLSI

A Novel Charge Pumped Clock Generator for VLSI

Article Preview

Abstract:

In this paper, a novel charge pumped clock generator is proposed, which can pump the reference cock to a level as high as double Vcc, while keeping the low level of the clock unchanged. The proposed circuit is very suitable for low voltage IC design to attain low on-resistance of MOS switch while keeping the parasitic capacitance small, which results in high speed of the circuit. The stimulated results show that the pumped clock has rising and falling time of 50ps and 67ps respectively.

You might also be interested in these eBooks

Applied Mechanics, Mechatronics Automation & System Simulation

Info:

Periodical:

Applied Mechanics and Materials (Volumes 198-199)

Pages:

1174-1178

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.198-199.1174

Citation:

Cite this paper

Online since:

September 2012

Authors:

Rong Bin Hu, Kun Liu, Jie Tang

Keywords:

Charge Pumped Circuit, Clock Generator, MOS Switch

Export:

RIS, BibTeX

Price:

Permissions CCC:

Request Permissions

Permissions PLS:

Request Permissions

Сopyright:

© 2012 Trans Tech Publications Ltd. All Rights Reserved

Share:

Citation:

[1] Y. Moisiadis, et al, A CMOS charge pump for low voltage operation, Proc., IEEE International Symposium on Circuits and Systems, pp.577-580, (2000).

DOI: 10.1109/iscas.2000.857500

[2] A. Richelli, et al, A 1. 2V-5V high efficiency CMOS charge pump for non-volatile memories, IEEE International Symposium on Circuits and Systems, pp.2411-2414, (2007).

DOI: 10.1109/iscas.2007.377946

[3] J.T. Wu, K. L. Chang, MOS charge pumps for low voltage operation, IEEE J. on Solid-State Circuits, pp.592-597, Apr. (1998).

DOI: 10.1109/4.663564

[4] R. Pelliconi, et al, Power efficient charge pump in deep submicron standard CMOS technology, Proc., 27th European Solid-State Circuits Conference, pp.73-76, (2001).

DOI: 10.1109/jssc.2003.811991

[5] C. C. Wang, et al Efficiency improvement in charge pump circuits, IEEE J. Solid-State Circuits, vol. 32, pp.852-860, Apr. (1998).

DOI: 10.1109/4.585287

[6] A. Cabrini, L. Gobbi and G. Torelli, Enhanced charge pump for ultra-low-voltage applications, Electronics Letters, vol. 42, no. 9, pp.512-514, (2006).

DOI: 10.1049/el:20060565

[7] C. Cruz, C. Filho, J. Lima, A charge pump without overstress for standard cmos process with improved current driver capability, IEEE 25 th Convention of Electrical and Electronics Engineers in Israel, pp.618-622, (2008).

DOI: 10.1109/eeei.2008.4736606

[8] G. van Steenwijk, K. Hoen, H. Wallinga, Analysis and design of a charge pump circuit for high output current applications, Nineteenth European Solid-State Circuits Conference, vol. 1, pp.118-121, (1993).

[9] P. Jun and T. Yoshihara, A charge pump circuit without overstress in low-voltage CMOS standard process, IEEE Conference on Electron Devices and Solid-State Circuits, pp.501-504, (2007).

DOI: 10.1109/edssc.2007.4450172

[10] N. Li, et al High efficiency four-phase all PMOS charge pump without body effects, International Conference on Communications, Circuits and Systems, pp.1083-1087, (2008).

DOI: 10.1109/icccas.2008.4657956

[11] Raben, H., Borg, J., Johansson, J., Improved efficiency in the CMOS cross-connected bridge rectifier for RFID applications, Mixed Design of Integrated Circuits and Systems (MIXDES), 2011 Proceedings of the 18th International Conference, On page(s): 334 - 339, Volume: Issue: , 16-18 June (2011).

DOI: 10.1109/mixdes.2016.7529757

[12] R. R. Troutman, Latch-up in CMOS Technology, 1986 : Kluwer.

[13] G. Hu, A better understanding of CMOS latchup, IEEE Trans. Electron Devices, vol. ED-31, p.62 (1984).

[14] R. K. Gupta, I. Sakai, and C. Hu, Effects of substrate resistance on CMOS latchup holding voltages, IEEE Trans. Electron Devices, vol. ED-34, pp.2309-2316 (1987).

DOI: 10.1109/t-ed.1987.23237

[15] R. Menozzi, et al., Layout dependence of CMOS latch-up, IEEE Trans. Electron Devices, vol. 35, pp.1892-1901 (1988).

DOI: 10.1109/16.7402

[16] Y. -H. Yang and C. -Y. Wu, A new criterion for transient latchup analysis in bulk CMOS, IEEE Trans. Electron Devices, vol. 36, pp.1336-1347 (1989).

DOI: 10.1109/16.30939

[17] T. Furuyama, et al., A latch-up-like new failure mechanism for high-density CMOS dynamic RAM's, IEEE J. Solid-State Circuits, vol. 25, pp.42-47 (1990).

DOI: 10.1109/4.50282

[18] D. B. Estreich, The physics and modeling of latch-up and CMOS integrated circuits, 1980 Kontos, D., Gauthier, R., Chatty, K., Domanskr, K., Muhammad, M., Seguin, C., Halbach, R., External Latchup Characteristics Under Static and Transient Conditions in Advanced Bulk CMOS Technologies, Reliability physics symposium, 2007. proceedings. 45th annual. ieee international, On page(s): 358 - 363, Volume: Issue: , 15-19 April (2007).

DOI: 10.1109/relphy.2007.369915

[19] M. Hargrove, S. Voldman, R. Gauthier, 1. Brown, K. Duncan, and W. Craig, Latchup in CMOS technology, , in Proc. IEEE Int. Reliab . Phys. Symp., 1998. pp.269-78.

DOI: 10.1109/relphy.1998.670561

[20] M. -D. Ker and S. -F. Hsu, Physical mechanism and device simulation on transient-induced latchup in CMOS ICs under system-level ESD test, , IEEE Trans. Electron Devices, vol. 52, no. 8, pp.1821-1831, (2005).

DOI: 10.1109/ted.2005.852728