Design of an UDP Protocol Stack IP for Internet Communication

Abstract:

This paper explains the importance of Ethernet communication in practical application, and designs an Ethernet communication soft-core based on FPGA. The soft-core proposed in this paper can implement data transmission and reception based on UDP Protocol stack. It can receive and unpack UDP protocol packet and extract the data out of the packet; it can also pack and send UDP protocol packet in preset length. The whole application is modeled in Verilog HDL. Experimental results show that the maximum frequency of proposed design is 100Mb/s, which is sufficient for most applications.

• Periodical: Applied Mechanics and Materials (Volumes 198-199)
• Pages: 1716-1719
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.198-199.1716
• Online since: September 2012
• Authors: Jian Hua Li, Guo Cheng Wang, Meng Zhang, Yi Chen
• Keywords: DM9000A, Ethernet, Field-Programmable Gate Array (FPGA), UDP

References

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