Static Analysis of Run-Time Inter-Core Interferences for Concurrent Programs in Shared Cache Multicore Architectures

Abstract:

Worst-Case Execution Time (WCET) is crucial in real-time systems and is very challenging in multicore processors due to the possible runtime inter-thread interferences caused by shared resources. This paper proposes a novel approach to analyze runtime inter-core interferences for consecutive or inconsecutive concurrent programs. Our approach can reasonably estimate runtime inter-core interferences in shared cache by introducing lifetime and instruction fetching timing relations analysis into address mapping method. Compared with the method based on lifetime alone, our proposed approach efficiently improves the tightness of WCET estimation.

• Periodical: Applied Mechanics and Materials (Volumes 198-199)
• Pages: 523-527
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.198-199.523
• Online since: September 2012
• Authors: Fang Yuan Chen, Dong Song Zhang, Zhi Ying Wang
• Keywords: Instruction Fetching Timing, Multicore Architectures, Shared Cache, WCET

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