A New Method to Reduce the Size of Lut in Digital Frequency Synthesizer

Abstract:

In this paper, the principal and application of digital frequency synthesizer are analyzed firstly. Then, the phase truncation error of phase accumulator is discussed theoretically and is eliminated by the real-time scrambling code from Linear Feedback Shift Registers (LFSR) for the purpose of engineering. At last, a new method combined difference method with coarse and fine lookup table (LUT) is proposed to reduce the length and amplitude of LUT. From the simulation of the new method, it is found that the LUT is reduced from 2^14*16 bit to2^10*14 bit and 2^14*7 bit. Also, the spurious free dynamic range of the power of output signal is more than 100dBc.The method can meet the request of project efficiently and save a lot of cost.

• Periodical: Applied Mechanics and Materials (Volumes 241-244)
• Pages: 618-622
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.241-244.618
• Online since: December 2012
• Authors: Yin Ping Cao, Yi Hua Dou
• Keywords: Coarse LUT and Fine LUT, Digital Frequency Synthesizer, LUT, Phase Truncation, Scrambling Code

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