ESD Robustness Designs for the HV Power DEMOS

Shen Li Chen; Chi Ling Chu

doi:10.4028/www.scientific.net/AMM.271-272.1286

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 271-272ESD Robustness Designs for the HV Power DEMOS

ESD Robustness Designs for the HV Power DEMOS

Abstract:

Two kinds of efficient electrostatic discharge (ESD) protection circuits in lateral drain extended MOSFETs (DEMOSFETs) will be designed and investigated in this paper. One kind of these test samples is fabricated with an SCR structure, which has the lowest turned-on resistance when it is triggered by a high voltage of ESD event. The SCR circuit is the most efficient of all protection devices in terms of ESD performance per unit area. Furthermore, the other type of these DUTs is an SCR with RC-triggered structure, which will have a small trigger voltage (Vt1) under ESD event, and then it obtains a good ESD immunity level.

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Periodical:

Applied Mechanics and Materials (Volumes 271-272)

Pages:

1286-1290

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.271-272.1286

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Online since:

December 2012

Authors:

Shen Li Chen, Chi Ling Chu

Keywords:

Drain Extended MOSFET (DEMOS), Electrostatic Discharge (ESD), Field-Oxide Device (FOD), High Voltage (HV), SCR, Trigger Voltage (V_t1)

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