Study on a New Method of Applying External Stress to MOS Device

Abstract:

The electrical characteristic of MOS device is susceptible to the external mechanical stress. In order to investigate the effect, the four-point bending technique has been used by many researchers to apply stress on the device. In this paper, a new way for applying stress to MOS device has been presented. The stress is applied by a metallic film which is deposited on the backside of the chip. Its convenient to apply different stress to each chip on the wafer. The above method is used to study the influence of stress on the performance of VDMOS device. The results show that the on-resistance decreases about 3% and 8% with the compressive stress of 50MPa and 70MPa respectively.

• Periodical: Applied Mechanics and Materials (Volumes 336-338)
• Pages: 1578-1581
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.336-338.1578
• Online since: July 2013
• Authors: Qiu Feng, Gui Lian Wang, Gui Fu Ding
• Keywords: Film Stress, MEMS, VDMOS

References

[1] O. Brand and G.K. Fedder, Huang QA and Qin M translate: CMOS MEMS technology and applications, southeast university, Nanjing, (2006).

[2] D. Cordano, G. Carnevale and M. Bocciarelli in: Computational Materials Science, 43, 951-956, (2008).

DOI: 10.1016/j.commatsci.2008.02.024

[3] Nicoleta Wacker, Harald Richter and Mahadi-UI Hassan in: Solid-State Electronics 57, 52-60, (2011).

[4] Abhinav Bhandari, Sean J. Hearne, Brian W. Sheldon and Sumit K. Soni in: J. Electrochem. Soc. 2009, Volume 156, Issue 8, Pages D279-D282.

[5] L.B. Freund and S. Suresh, Lu L translate: The film material- formation of stress and defects and surface evolution, sciencep, Beijing, (2006).

[6] Scott E. Thompson, Guangyu Sun, Youn Sung Choi, and Toshikazu Nishida in: IEEE Trans. Electron Devices, Vol. 53 No. 5, (2006).

DOI: 10.1109/ted.2006.872088

[7] G.C.A.M. Janssen, M.M. Abdalla, F. van Keulen, B.R. Pujada, B. van Venrooy in: Thin Solid Films 517 (2009) 1858–1867.

DOI: 10.1016/j.tsf.2008.07.014