Design and Implementation of Reconfigurable Encryption and Decryption System Based on SOPC

Abstract:

The system is based on DES/3DES, AES cipher algorithm as the research object.According to the characteristics of the algorithm, designs a configuration mode which can share resource in space and configurate algorithm in time. Then it uses hardware description language Verilog HDL to realize and optimize the design, and completes a custom reconfigurable DES/3DES/AES encryption/decryption IP core. By SOPC technology, the IP core, Nios II processor, network controller and other function. The design hardware structureis simple, flexibility, security, which can be widely used in the field of informationsecurity.

• Periodical: Applied Mechanics and Materials (Volumes 347-350)
• Pages: 2979-2982
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.347-350.2979
• Online since: August 2013
• Authors: Qing Fang Zhou, Qian Huang, Ying Yuan, Jun Yang
• Keywords: 3DES, AES, DES, SOPC

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DOI: 10.1016/s1004-4132(08)60134-6