Design of FPGA Debugging Interface Based on EZ-USB Slave FIFO

Ling Li

doi:10.4028/www.scientific.net/AMM.367.240

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vol. 367Design of FPGA Debugging Interface Based on EZ-USB...

Design of FPGA Debugging Interface Based on EZ-USB Slave FIFO

Abstract:

The USB which has high-speed streaming data and can plug and play meets the requirement of the data transfer mission. CY7C68013 have an ingenious architecture and can automatically deal with most data communication in USB 2.0 specifications. A high speed streaming data system based on EZ-USB FX2 was designed. The debugging interface based on slave FIFO of EZ-USB FX2 can send data in bulk from FPDA to upper computer; its convenient to system debugging work.

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Periodical:

Applied Mechanics and Materials (Volume 367)

Pages:

240-244

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.367.240

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Cite this paper

Online since:

August 2013

Authors:

Ling Li

Keywords:

Debugging Interface, Field-Programmable Gate Array (FPGA), Firmware, First in First Out, Universal Serial Bus

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References

[1] EZ-USB FX2 technical reference manual version 2. 0. Cypress Semiconductor Corp data book( 2001).

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[2] Cypress Semiconductor. EZ-USB FX2TM GPIF Primer(2003).

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[3] Xiao Ju-xiong, Weng Tie-cheng, Song Zhong-qing, in: USB technology and application technology. Beijing: Tsinghua University press(2003).

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[4] Qian Feng, in: Ez-usb FX2 single-chip computer principle, programming and application. Beijing: Beijing University of Aeronautics and Astronautics press (2006).

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