Anti-Radiation Design and Irradiation Test of Antifuse FPGA

Kai Feng Zhang; Shang Feng Chen; Shan Zhu Xiao

doi:10.4028/www.scientific.net/AMM.380-384.3249

Paper Titles

Implementation of TD-LTE Downlink Channel Estimation Based on DSP
p.3230

Day-Ahead Optimum Dispatching Model of Wind-Thermal Power System and its Application
p.3235

Investigated Solution Concentration Sensors Based on the Etched Phase Shifted Fiber Bragg Grating
p.3239

Research on Intelligent Sensor Network Gateway Based on Embedded System
p.3243

Anti-Radiation Design and Irradiation Test of Antifuse FPGA
p.3249

Reactive Power Optimization in Regional Power Grid
p.3254

Design of a Wireless Laser Pointer Based on MCU
p.3258

Research of Geoelectric Field Observation Interference with Different Electrode Arrangements from UHVDC Power Lines
p.3262

Improve the LVRT Ability of Wind Farm with DFIG by Combination of SVC and DVR
p.3266

HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 380-384Anti-Radiation Design and Irradiation Test of...

Anti-Radiation Design and Irradiation Test of Antifuse FPGA

Abstract:

Antifuse FPGA because for its low power consumption, high reliability, high security, etc., are widely used in space electronic systems. However, antifuse FPGA running in the space environment is also vulnerable to space radiation. This paper analyzes the single event effects in antifuse FPGA in detail and put forward the TMR and EDAC anti-SEE hardening design and implementation methods. The ground heavy ions accelerated test is conducted to verify the design of hardening; test results and analysis show that the hardening design method can effectively improve the COTS antifuse FPGA for space applications reliability.

You might also be interested in these eBooks

View Preview

Info:

Periodical:

Applied Mechanics and Materials (Volumes 380-384)

Pages:

3249-3253

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.380-384.3249

Citation:

Cite this paper

Online since:

August 2013

Authors:

Kai Feng Zhang, Shang Feng Chen, Shan Zhu Xiao

Keywords:

Antifuse FPGA, Hardened Technology, Single Event Effects, Space Electronic System

Export:

RIS, BibTeX

Price:

Permissions CCC:

Request Permissions

Permissions PLS:

Request Permissions

Сopyright:

Citation:

References

[1] J. J. Wang, Radiation effects in FPGAs, The 9th Workshop on Electronics for LHC Experiments, Amsterdam, Netherlands, Oct. 2003, pp.34-43.

Google Scholar

[2] R. Katz, K. LaBel, J. J. Wang, B. Cronquist, R. Koga,S. Penzin, and G. Swift, Radiation Effects on Current Field Programmable Technologies, IEEE Transactions on Nuclear Science. NS-44, 1945, (1997).

DOI: 10.1109/23.658966

Google Scholar

[3] J. J. Wang, W. Wong, S, Wolday, et al. Single event upset and hardening in 0. 15 um antifuse-based field programmable gate array. , IEEE Transactions on Nuclear Science, 2003, 50(6), pp.2158-2166.

DOI: 10.1109/tns.2003.822090

Google Scholar

[4] K. F. Xing, J. Yang, Y. K. Wang, et al. Study on anti-radiation technique for Xilinx SRAM-based FPGA, Journal of Astronautics, 2007, 28(1): 123-129.

Google Scholar

[5] J. S. George, R. Koga, M. Zakrzewski, Single event effects tests on the Actel RTAX2000S FPGA, IEEE Radiation Effects Data Workshop, July, 20, 2009, pp.140-147.

DOI: 10.1109/redw.2009.5336298

Google Scholar

[6] R. Katz, J. J. Wang, R. Koga, et al. Current radiation issues for programmable elements and devices, IEEE Transactions on Nuclear Science, 1998, 45(6), pp.2600-2610.

DOI: 10.1109/23.736503

Google Scholar