The FPGA Design and Implementation of Pipeline Image Processing in the GPU System

Ke Nian Wang; Hui Min Du

doi:10.4028/www.scientific.net/AMM.380-384.3807

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 380-384The FPGA Design and Implementation of Pipeline...

The FPGA Design and Implementation of Pipeline Image Processing in the GPU System

Abstract:

In the GPU system, pipeline image processing is facing the problem that a large amount of data to be processed, complicated processing procedure, more data transmission channels, and etc. All of these lead to low processing speed and large circuit area. This paper proposed a FPGA design of the pipeline image processing in GPU. The design has been implemented by foam extrusion pipeline architecture and validated on Xilinx Virtex XC6VLX550T FPGA. The results show that the consumption of resources is 390726.09 and the speed is 200MHz.

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Periodical:

Applied Mechanics and Materials (Volumes 380-384)

Pages:

3807-3810

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.380-384.3807

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Online since:

August 2013

Authors:

Ke Nian Wang, Hui Min Du

Keywords:

Graphic Processing Unit (GPU), Imageprocessing, Pipeline

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