Research on Algorithm in Fast Modular Exponentiation Based on FPGA

Article Preview

Abstract:

Modular exponentiation of large number is widely applied in public-key cryptosystem, also the bottleneck in the computation of public-key algorithm. Modular multiplication is the key calculation in modular exponentiation. An improved Montgomery algorithm is utilized to achieve modular multiplication and converted into systolic array to increase the running frequency. A high efficiency fast modular exponentiation structure is developed on FPGA to bring the best out of the modular multiplication module and enhance the ability of defending timing attacks and power attacks. For 1024 bit key operands, the design can be run at 170MHz.

You might also be interested in these eBooks

Info:

Periodical:

Pages:

499-502

Citation:

Online since:

October 2013

Export:

Price:

Permissions CCC:

Permissions PLS:

Сopyright:

© 2013 Trans Tech Publications Ltd. All Rights Reserved

Share:

Citation:

[1] Xiaona Jiang, Chenhua Duan. Improved Montgomery Algorithm and its modular multiplier implementation [J]. Computer Engineering, 2008, 34(12); 209-211.

Google Scholar

[2] MIAOQING HUANG, KRIS GAJ, TAREK EL-GHAZAWI. New hardware architectures for Montgomery modular multiplication algorithm[J]. IEEE Transactions on Computers, 2011, 60(7): 923-936.

DOI: 10.1109/tc.2010.247

Google Scholar

[3] C.D. WALTER. Montgomery exponentiation needs no final subtraction[J]. Electronics Letters, 1999, 35(21): 1831-1832.

DOI: 10.1049/el:19991230

Google Scholar

[4] GAËL HACHEZ, JEAN-JACQUES QUISQUATER. Montgomery exponentiation with no final subtractions: improved results [A]. CHES 2000. Lecture Notes in Computer Science[C]. 2000: 293-301.

DOI: 10.1007/3-540-44499-8_23

Google Scholar