An Improved SAR Controller for ADDLL Used in DVFS System

Jin Fan; You Wu Tao; Tai Long Xu; Zhi Kuang Cai; Chang Yong Zheng; Jun Ning Chen

doi:10.4028/www.scientific.net/AMM.543-547.780

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 543-547An Improved SAR Controller for ADDLL Used in DVFS...

An Improved SAR Controller for ADDLL Used in DVFS System

Abstract:

An improved successive approximation register (SAR) controller for all digital delay-locked loops (ADDLLs) is proposed to overcome the dead lock problem of the conventional SAR controller by embedding a restarting circuit module into the conventional SAR controller. The ADDLL that adopts the new SAR controller can track the operating frequency variation after the first lock-in, keep the advantages of the SAR searching algorithm and satisfy the requirements of DVFS systems.

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Periodical:

Applied Mechanics and Materials (Volumes 543-547)

Pages:

780-783

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.543-547.780

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Online since:

March 2014

Authors:

Jin Fan, You Wu Tao, Tai Long Xu*, Zhi Kuang Cai, Chang Yong Zheng, Jun Ning Chen

Keywords:

All-Digital Delay-Locked Loop, Clock Skew, Dynamic Voltage/Frequency Scaling, Lock Time, Successive Approximation Register

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* - Corresponding Author

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