Analysis and Simulation on Clock Resynchronization in Time Triggered Architecture

Chun Xu; Yue Lin; Ya Nan Gao; Song Tao Fan

doi:10.4028/www.scientific.net/AMM.556-562.4408

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 556-562Analysis and Simulation on Clock Resynchronization...

Analysis and Simulation on Clock Resynchronization in Time Triggered Architecture

Abstract:

An improved clock synchronization algorithm for time triggered architecture has been proposed in this paper. A single reference real time is added in the system, so periodically calibration to real time can be achieved. This algorithm is based on the classical Welch-Lynch^[^1] fault tolerant clock synchronization process. Systematic clock drift problem has been solved by using the algorithm. Formal analysis is presented, and verification is taken on Matlab/Simulink platform. Simulation result has verified the performance of the algorithm, and the clock difference is bounded as expected.

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Periodical:

Applied Mechanics and Materials (Volumes 556-562)

Pages:

4408-4411

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.556-562.4408

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Online since:

May 2014

Authors:

Chun Xu*, Yue Lin, Ya Nan Gao, Song Tao Fan

Keywords:

Clock Resynchronization, Formal Analysis, Oscillator Drift, Time Triggered

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References

[1] Jennifer Lundelius Welch, Nancy Lynch. A new fault-tolerant algorithm for clock synchronization, [J]. Information and Computation. Volume 77, Issue 1, April 1988, Pages 1–36.

DOI: 10.1016/0890-5401(88)90043-0

Google Scholar

[2] FreeScale. FlexRay Data Link Layer Conformance Test Specification,. FlexRay Data Sheet.

DOI: 10.3403/30253317

Google Scholar

[3] http: /www. tttech. com/technologies/ttethernet.

Google Scholar

[4] J. Halpern, B. Simons, R. Strong, D. Dolev. Fault-tolerant clock synchronization, [J]. Proceedings of the Third Annual ACM Symposium on Principles of Distributed Computing (1984), p.89–102.

DOI: 10.1145/800222.806739

Google Scholar

[5] J. Rushby and F. von Henke, Formal Verification of Algorithms for Critical Systems, IEEE Trans. Software Eng., vol. 19, no. 1, pp.13-23, Jan. (1993).

DOI: 10.1109/32.210304

Google Scholar

[6] Sofiane Zaidi, Fateh Boutekkouk. Design and Simulation of the Timed Triggered Protocol (TTP) Using Agents. AASRI Procedia. Volume 4, 2013, Pages 110–117.

DOI: 10.1016/j.aasri.2013.10.018

Google Scholar