An Optical Inspection System for Chip Defects Using a High Rate Line Scanner

Abstract:

Based on a line scan imager, we propose anew defect inspection system to precisely identify defects with size of greater than criteria from chip backside. Only a corresponding raw image is acquiredfor each chip,and using anopto-mechanical device with very low geometry distortion to make it feasible to neglectprocesses of image calibration and mosaic. Defect inspection is based on a binary chip edge image and a novel methodof using edge pixels statistic. Thus defect size of crack, chipping and glue can be inspected quantitatively and efficiently.From test results by integrating inspection system with experimental and operational chip sorters, our system has capabilities of maximal chip moving speed of0.7 m/sec (5μm resolution) andinspecting chip defects with size accuracyof less than 1.0 pixel. Proposed system has features of automatically acquiring chip images during packaging process, improving performance of image processing and defects inspection. Moreover, manpower, time and cost for chip defect inspection manually can be saved. Chip quality control can be improved as well comparing with the one by manual way.Developed system has been integrated with operational chip sorters successfully for sale now.

• Periodical: Applied Mechanics and Materials (Volume 574)
• Pages: 462-467
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.574.462
• Online since: July 2014
• Authors: Ming Fu Chen*, Chih Chung Chou, Chun Jie Lien, Rui Cian Weng
• Keywords: Chip Defect Inspection, Edge Detection, Edge Pixel Statistic, Line Scan Imager

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