An Algorithm Based on Related-Selection for Network of Reversible Logic Gates

Abstract:

This paper presents an algorithm based on related selection for reversible logic synthesis, and the algorithm is optimized. The algorithm realizes the synthesis of the whole 3-varibles functions and some part of 4-varibles functions. The algorithm for the space complexity is O(n*2ⁿ). Compared with other algorithm for reversible logic synthesis at home and abroad, this algorithm has a less gate number in the synthesis of the whole 3-varibles functions and some examples in benchmark.

• Periodical: Applied Mechanics and Materials (Volumes 651-653)
• Pages: 2248-2251
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.651-653.2248
• Online since: September 2014
• Authors: Yi Qing Zhang*, Ming Qiang Xu, Yi Qu, Zhi Jin Guan
• Keywords: Absolute Chaos Degree, Related-Selection, Reversible Gate, Reversible Logic

References

[1] P Gupta, A Agrawal and N K. Jha: An algorithm for synthesis of reversible logic circuits[J] . Computer-Aided Design of Integrated Circuits and Systems, 25(2006), pp.2317-2330.

DOI: 10.1109/tcad.2006.871622

[2] D Maslov, G W Dueck, and D M. Miller: Toffoli network synthesis with templates[J]. Computer Aided Design of Integrated Circuits and Systems, 24(2005), pp.807-817.

DOI: 10.1109/tcad.2005.847911

[3] D M Miller, G W Dueck: Spectral techniques for reversible logic synthesis[C]. Representations and Method-pology of Future Computing Technologies, (2003), pp.56-62.

[4] M Saeedi, M Sedighi, and M S Zamani: A novel synthesis algorithm for reversible circuits[C]. Computer-Aided Design. (2007), pp.65-68.

DOI: 10.1109/iccad.2007.4397245

[5] V V Shende, A K Prasad, I L Markov, and J P Hayes: Synthesis of reversible logic circuits [J] . Computer-Aided Design of Integrated Circuits and Systems, 22(2003 ), pp.710-722.

DOI: 10.1109/tcad.2003.811448

[6] Wan Sishuang, Chen Hanwu, and Cao Rujin: A Novel Transformation-Based Algorithm for Reversible Logic Synthesis [J]. Computer science, 5821 (2009), pp.70-81.

[7] Zheng Yexin, Huang Chao: A novel Toffoli network synthesis algorithm for reversible logic[C]. Design Automation Conference, (2009), p.739–744.

DOI: 10.1109/aspdac.2009.4796568