The Design and Implement for Transceiver of WIA-PA

Mao Qiang Duan; Xiao Li Huang; Jian Jun Wang

doi:10.4028/www.scientific.net/AMM.701-702.1045

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 701-702The Design and Implement for Transceiver of WIA-PA

The Design and Implement for Transceiver of WIA-PA

Abstract:

In this paper, the system scheme and system architecture for transceiver of WIA-PA are presented. The low-IF topology and direct up conversion method are employed, corresponding to receiver part and transmitter part. And in the baseband part, differential and correlation demodulate received signals, as well as time sync, frequency offset calibrate and frame sync operations are designed for solvation the problem of real radio environmental effects. The chip implements using 0.18μm CMOS process has small chip area and low power consumption. The minimum sensitivity of receiver is less than-85dBm for 1% PER (packet error rate), which is better than the required sensitivity for specification.

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Periodical:

Applied Mechanics and Materials (Volumes 701-702)

Pages:

1045-1048

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.701-702.1045

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Online since:

December 2014

Authors:

Mao Qiang Duan*, Xiao Li Huang, Jian Jun Wang

Keywords:

Demodulator, IEEE 802.15.4, Transceiver, WIA-Pa

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* - Corresponding Author

References

[1] He Nan, Liu Fend. Research on Time Synchronization of WIA-PAIndustrial WirelessNetworks. CiSE Conf. (2009).

Google Scholar

[2] Ping Wang, Qiuhong Pan and Heng Wang. An Improved Adaptive Channel Hopping Scheme for WIA-PA Industrial Wireless Networks. ICACTE Conf. 2010, Vol. 1(2010), pp.596-600.

DOI: 10.1109/icacte.2010.5578945

Google Scholar

[3] Xiaojie Du, Feng Liu. Industrial wireless networks wia-pa cross-layer design research. ICIFE Conf. 2010, Vol. 1 (2010), pp.344-347.

DOI: 10.1109/icife.2010.5609374

Google Scholar

[4] IEEE Standard Part 15. 4: Wireless Medium Access Control (MAC) andPhysical Layer (PHY) Specification for Wireless Personal AreaNetworks (WPANs), IEEE standard 802. 15. 4-(2006).

DOI: 10.1109/ieeestd.2002.93621

Google Scholar

[5] Shuenn-Yuh Lee, Liang-Hung Wang, Tsung-Yen Chen, Yu, Chih-Tao. A Low-Power RF Front-End with Merged LNA, DifferentialPower Splitter, and Quadrature Mixer for IEEE 802. 15. 4(ZigBee) Applications. ISCAS Conf. 2012, Vol. 1 (2012), pp.1492-1495.

DOI: 10.1109/iscas.2012.6271531

Google Scholar

[6] Khalaf, L.D., AlShalalfah, A., Burghal, D. Design and laboratory testing of 802. 15. 4 2. 4 GHz baseband modem, NRSC Conf. 2011, Vol. 1( 2011), pp.1710-1719.

DOI: 10.1109/nrsc.2011.5873607

Google Scholar