Architecture-Specific Mapping Tool for SOI-Based FPGA
This paper addresses several key issues in the design of the mapping tool used for the FPGA application implementation in our SRAM-based FPGAs fabricated in a 0.5 micron SOI-CMOS process, with particular emphasis on FPGA architecture interrelated mapping step and packing method for CAD tool. Considering the routability and testability of the FPGA and the CAD tool, the algorithm combines the FPGA structure with the object netlist, mapping the basic elements into basic building blocks in order to reduce the resource usage. The result is proven in extensive test circuits used in our FPGA design.
Q. L. Zhang et al., "Architecture-Specific Mapping Tool for SOI-Based FPGA", Advanced Materials Research, Vol. 159, pp. 438-443, 2011